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公开(公告)号：US20120216158A1
公开(公告)日：2012-08-23
申请号：US13457932
申请日：2012-04-27
申请人： Stephen W. BEDELL , Kangguo CHENG , Bruce B. DORIS , Ali KHAKIFIROOZ , Pranita KULKARNI , Katherine L. SAENGER
发明人： Stephen W. BEDELL , Kangguo CHENG , Bruce B. DORIS , Ali KHAKIFIROOZ , Pranita KULKARNI , Katherine L. SAENGER
CPC分类号： H01L21/84 , H01L21/823807
摘要： Strained Si and strained SiGe on insulator devices, methods of manufacture and design structures is provided. The method includes growing an SiGe layer on a silicon on insulator wafer. The method further includes patterning the SiGe layer into PFET and NFET regions such that a strain in the SiGe layer in the PFET and NFET regions is relaxed. The method further includes amorphizing by ion implantation at least a portion of an Si layer directly underneath the SiGe layer. The method further includes performing a thermal anneal to recrystallize the Si layer such that a lattice constant is matched to that of the relaxed SiGe, thereby creating a tensile strain on the NFET region. The method further includes removing the SiGe layer from the NFET region. The method further includes performing a Ge process to convert the Si layer in the PFET region into compressively strained SiGe.
摘要翻译： 应变Si和应变SiGe绝缘体器件，制造方法和设计结构。 该方法包括在绝缘体上硅晶片上生长SiGe层。 该方法还包括将SiGe层图案化成PFET和NFET区域，使得PFET和NFET区域中的SiGe层中的应变被放宽。 该方法还包括通过离子注入直接在SiGe层下面的Si层的至少一部分而非晶化。 该方法还包括进行热退火以使Si层重结晶，使得晶格常数与弛豫SiGe的晶格常数相匹配，从而在NFET区域上产生拉伸应变。 该方法还包括从NFET区域去除SiGe层。 该方法还包括执行Ge工艺以将PFET区域中的Si层转换为压缩应变的SiGe。
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公开(公告)号：US20140011328A1
公开(公告)日：2014-01-09
申请号：US13544093
申请日：2012-07-09
IPC分类号： H01L21/84 , H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823878 , H01L21/84 , H01L27/1203
摘要： A method for fabricating field effect transistors patterns a strained silicon layer formed on a dielectric layer of a substrate into at least one NFET region including at least a first portion of the strained silicon layer. The strained silicon layer is further patterned into at least one PFET region including at least a second portion of the strained silicon layer. A masking layer is formed over the first portion of the strained silicon layer. After the masking layer has been formed, the second strained silicon layer is transformed into a relaxed silicon layer. The relaxed silicon layer is transformed into a strained silicon germanium layer.
摘要翻译： 用于制造场效应晶体管的方法将形成在衬底的电介质层上的应变硅层图案化成至少一个包括应变硅层的第一部分的NFET区域。 将应变硅层进一步图案化成至少一个包括应变硅层的至少第二部分的PFET区域。 在应变硅层的第一部分上形成掩模层。 在形成掩模层之后，将第二应变硅层转变成松弛的硅层。 松弛的硅层被转变成应变硅锗层。
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公开(公告)号：US20140008729A1
公开(公告)日：2014-01-09
申请号：US13615016
申请日：2012-09-13
IPC分类号： H01L21/336 , H01L27/092 , H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823878 , H01L21/84 , H01L27/1203
摘要： A structure includes a tensilely strained nFET region including a strained silicon layer of a silicon on insulator wafer. A relaxed nFET region includes one of an ion implanted silicon and an ion implanted silicon dioxide interface layer of a tensilely strained silicon layer of the silicon on insulator wafer. A compressively strained pFET region includes a SiGe layer which was converted from a tensilely strained silicon layer of the silicon on insulator wafer. A relaxed pFET region includes one of an ion implanted silicon and an ion implanted silicon dioxide interface layer of a tensilely strained silicon layer of the silicon on insulator wafer.
摘要翻译： 一种结构包括包括绝缘体硅晶片的应变硅层的拉伸应变nFET区域。 松弛的nFET区域包括离子注入硅和绝缘体硅晶片的拉伸应变硅层的离子注入二氧化硅界面层之一。 压缩应变pFET区域包括从绝缘体硅晶片的拉伸应变硅层转换的SiGe层。 松弛的pFET区域包括离子注入硅和绝缘硅晶片上的拉伸应变硅层的离子注入二氧化硅界面层之一。
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