公开(公告)号：US20110131354A1

公开(公告)日：2011-06-02

申请号：US12947966

申请日：2010-11-17

申请人： Sterling Smith ,  Hsian-Feng Liu ,  Eer-Wen Tyan ,  Chun-Chia Chen ,  Ming-Chieh Yeh ,  Chung-Ching Chen ,  Yo-Lin Chen

发明人： Sterling Smith ,  Hsian-Feng Liu ,  Eer-Wen Tyan ,  Chun-Chia Chen ,  Ming-Chieh Yeh ,  Chung-Ching Chen ,  Yo-Lin Chen

IPC分类号： G06F13/38

CPC分类号： G06F17/5068

摘要： A universal memory I/O generating apparatus includes a defining module, a retrieving module, a generating module, and a layout module. The defining module defines a mapping table according to a pin configuration of a plurality of I/Os. The mapping table includes corresponding relationships between the plurality of IOs and a plurality of memory functions. The retrieving module retrieves control information corresponding to the mapping table from candidate information, which is associated with the corresponding relationships between the plurality of I/Os and the plurality of memory functions. The generating module generates a hardware description language (HDL) file according to the control information. The layout module programs the plurality of I/Os according to the HDL file, so that each of the I/Os can correspond to its corresponding memory function.

摘要翻译： 通用存储器I / O生成装置包括定义模块，检索模块，生成模块和布局模块。 定义模块根据多个I / O的引脚配置来定义映射表。 映射表包括多个IO和多个存储器功能之间的对应关系。 检索模块从与多个I / O和多个存储器功能之间的对应关系相关联的候选信息中检索对应于映射表的控制信息。 生成模块根据控制信息生成硬件描述语言（HDL）文件。 布局模块根据HDL文件对多个I / O进行编程，使得每个I / O可以对应于其相应的存储器功能。

公开(公告)号：US08635569B2

公开(公告)日：2014-01-21

申请号：US12947966

申请日：2010-11-17

申请人： Sterling Smith ,  Hsian-Feng Liu ,  Eer-Wen Tyan ,  Chun-Chia Chen ,  Ming-Chieh Yeh ,  Chung-Ching Chen ,  Yo-Lin Chen

发明人： Sterling Smith ,  Hsian-Feng Liu ,  Eer-Wen Tyan ,  Chun-Chia Chen ,  Ming-Chieh Yeh ,  Chung-Ching Chen ,  Yo-Lin Chen

IPC分类号： G06F17/50

CPC分类号： G06F17/5068

摘要： A universal memory I/O generating apparatus includes a defining module, a retrieving module, a generating module, and a layout module. The defining module defines a mapping table according to a pin configuration of a plurality of I/Os. The mapping table includes corresponding relationships between the plurality of IOs and a plurality of memory functions. The retrieving module retrieves control information corresponding to the mapping table from candidate information, which is associated with the corresponding relationships between the plurality of I/Os and the plurality of memory functions. The generating module generates a hardware description language (HDL) file according to the control information. The layout module programs the plurality of I/Os according to the HDL file, so that each of the I/Os can correspond to its corresponding memory function.

摘要翻译： 通用存储器I / O生成装置包括定义模块，检索模块，生成模块和布局模块。 定义模块根据多个I / O的引脚配置来定义映射表。 映射表包括多个IO和多个存储器功能之间的对应关系。 检索模块从与多个I / O和多个存储器功能之间的对应关系相关联的候选信息中检索与映射表相对应的控制信息。 生成模块根据控制信息生成硬件描述语言（HDL）文件。 布局模块根据HDL文件对多个I / O进行编程，使得每个I / O可以对应于其相应的存储器功能。

公开(公告)号：US08412883B2

公开(公告)日：2013-04-02

申请号：US12976815

申请日：2010-12-22

申请人： Yo-Lin Chen ,  Hsian-Feng Liu ,  Ming-Chieh Yeh

发明人： Yo-Lin Chen ,  Hsian-Feng Liu ,  Ming-Chieh Yeh

IPC分类号： G06F12/00

CPC分类号： G06F13/161 ,  G06F13/1673

摘要： A memory controller and an associated controlling method are provided. The memory controller is connected to a memory module, and includes a FIFO buffer for receiving valid data outputted from the memory module, a write pointer for indicating written data stored in the FIFO buffer, and a read pointer for indicating read data stored in the FIFO buffer. According to the controlling method, during a CAS latency of the memory module after a read command is generated, the value of the write pointer is controlled to have the same value as that of the read pointer.

摘要翻译： 提供存储器控制器和相关联的控制方法。 存储器控制器连接到存储器模块，并且包括用于接收从存储器模块输出的有效数据的FIFO缓冲器，用于指示存储在FIFO缓冲器中的写入数据的写指针和用于指示存储在FIFO中的读数据的读指针 缓冲。 根据该控制方法，在生成读取命令之后的存储器模块的CAS等待时间期间，写入指针的值被控制为具有与读取指针相同的值。

公开(公告)号：US20110153963A1

公开(公告)日：2011-06-23

申请号：US12976815

申请日：2010-12-22

申请人： Yo-Lin Chen ,  Hsian-Feng Liu ,  Ming-Chieh Yeh

发明人： Yo-Lin Chen ,  Hsian-Feng Liu ,  Ming-Chieh Yeh

IPC分类号： G06F12/02

CPC分类号： G06F13/161 ,  G06F13/1673

摘要： A memory controller and an associated controlling method are provided. The memory controller is connected to a memory module, and includes a FIFO buffer for receiving valid data outputted from the memory module, a write pointer for indicating written data stored in the FIFO buffer, and a read pointer for indicating read data stored in the FIFO buffer. According to the controlling method, during a CAS latency of the memory module after a read command is generated, the value of the write pointer is controlled to have the same value as that of the read pointer.

摘要翻译： 提供存储器控制器和相关联的控制方法。 存储器控制器连接到存储器模块，并且包括用于接收从存储器模块输出的有效数据的FIFO缓冲器，用于指示存储在FIFO缓冲器中的写入数据的写指针和用于指示存储在FIFO中的读数据的读指针 缓冲。 根据该控制方法，在生成读取命令之后的存储器模块的CAS等待时间期间，写入指针的值被控制为具有与读取指针相同的值。