Performing a cyclic redundancy checksum operation responsive to a user-level instruction
    7.
    发明授权
    Performing a cyclic redundancy checksum operation responsive to a user-level instruction 有权
    响应于用户级指令执行循环冗余校验和操作

    公开(公告)号:US08225184B2

    公开(公告)日:2012-07-17

    申请号:US13097462

    申请日:2011-04-29

    IPC分类号: H03M13/00

    摘要: In one embodiment, the present invention includes a method for receiving a user-level instruction for a checksum operation in a processor, where the user-level instruction specifies a source operand of a first size and a destination operand of a second size, receiving the source operand and the destination operand in the processor, and performing the checksum operation using the source operand and the destination operand in the processor responsive to the instruction. In an embodiment, the processor has multiple hardware engines that each can perform the checksum operation for one of multiple data sizes. Other embodiments are described and claimed.

    摘要翻译: 在一个实施例中,本发明包括一种用于在处理器中接收用于校验和操作的用户级指令的方法,其中用户级指令指定第二大小的源操作数和第二大小的目的地操作数,接收 源操作数和目的地操作数,并且响应于指令,使用处理器中的源操作数和目标操作数执行校验和操作。 在一个实施例中,处理器具有多个硬件引擎,每个硬件引擎可以对多个数据大小之一执行校验和操作。 描述和要求保护其他实施例。