公开(公告)号：US20190221595A1

公开(公告)日：2019-07-18

申请号：US16167241

申请日：2018-10-22

Applicant: Stratio Inc.

Inventor： Jae Hyung LEE ,  Yeul NA ,  Youngsik KIM ,  Woo-Shik JUNG

IPC: H01L27/146 ,  H04N5/378 ,  H01L31/113 ,  H01L31/18

CPC classification number: H01L27/14616 ,  H01L27/14614 ,  H01L27/14649 ,  H01L27/14689 ,  H01L31/1136 ,  H01L31/1804 ,  H04N5/361 ,  H04N5/378

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

公开(公告)号：US20230019977A1

公开(公告)日：2023-01-19

申请号：US17684124

申请日：2022-03-01

Applicant: Stratio, Inc.

Inventor： Jae Hyung LEE ,  Yeul NA ,  Youngsik KIM ,  Woo-Shik JUNG

IPC: H01L27/146 ,  H01L31/113 ,  H01L31/18 ,  H04N5/378

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.