-
公开(公告)号：US08279659B2
公开(公告)日：2012-10-02
申请号：US12617305
申请日：2009-11-12
IPC分类号： G11C11/00
CPC分类号： G11C11/419 , G11C7/08 , G11C7/14 , G11C7/22 , G11C7/222 , G11C7/227 , G11C8/08 , G11C11/418 , G11C2207/065
摘要： A system and method of operating a memory device is disclosed. In a particular embodiment, an apparatus is disclosed that includes a bit cell coupled to a first bit line and to a second bit line. The apparatus also includes a sense amplifier coupled to the first bit line and to the second bit line. The apparatus includes a loop circuit configured to provide a sense amplifier enable signal to the sense amplifier in response to receiving a first signal. The apparatus also includes a wordline enable circuit configured to provide a wordline enable signal to a wordline driver in response to receiving a second signal. The loop circuit receives the first signal before the wordline enable circuit receives the second signal.
摘要翻译： 公开了一种操作存储器件的系统和方法。 在特定实施例中，公开了一种包括耦合到第一位线和第二位线的位单元的装置。 该装置还包括耦合到第一位线和第二位线的读出放大器。 该装置包括一个环路电路，其被配置为响应于接收到第一信号向感测放大器提供读出放大器使能信号。 该装置还包括字线使能电路，其被配置为响应于接收到第二信号而向字线驱动器提供字线使能信号。 环路电路在字线使能电路接收到第二信号之前接收第一信号。
-
公开(公告)号：US20110110174A1
公开(公告)日：2011-05-12
申请号：US12617305
申请日：2009-11-12
CPC分类号： G11C11/419 , G11C7/08 , G11C7/14 , G11C7/22 , G11C7/222 , G11C7/227 , G11C8/08 , G11C11/418 , G11C2207/065
摘要： A system and method of operating a memory device is disclosed. In a particular embodiment, an apparatus is disclosed that includes a bit cell coupled to a first bit line and to a second bit line. The apparatus also includes a sense amplifier coupled to the first bit line and to the second bit line. The apparatus includes a loop circuit configured to provide a sense amplifier enable signal to the sense amplifier in response to receiving a first signal. The apparatus also includes a wordline enable circuit configured to provide a wordline enable signal to a wordline driver in response to receiving a second signal. The loop circuit receives the first signal before the wordline enable circuit receives the second signal.
摘要翻译： 公开了一种操作存储器件的系统和方法。 在特定实施例中，公开了一种包括耦合到第一位线和第二位线的位单元的装置。 该装置还包括耦合到第一位线和第二位线的读出放大器。 该装置包括一个环路电路，其被配置为响应于接收到第一信号向感测放大器提供读出放大器使能信号。 该装置还包括字线使能电路，其被配置为响应于接收到第二信号而向字线驱动器提供字线使能信号。 环路电路在字线使能电路接收到第二信号之前接收第一信号。
-
公开(公告)号：US07995378B2
公开(公告)日：2011-08-09
申请号：US11959515
申请日：2007-12-19
IPC分类号： G11C11/00
CPC分类号： G11C11/1675 , G11C11/1659 , G11C11/1673
摘要： In a particular embodiment, a memory device includes a first memory cell and a second memory cell. The memory device also includes a first bit line associated with the first memory cell and a second bit line associated with the second memory cell. The memory device also includes a source line coupled to the first memory cell and coupled to the second memory cell.
摘要翻译： 在特定实施例中，存储器设备包括第一存储器单元和第二存储器单元。 存储器件还包括与第一存储器单元相关联的第一位线和与第二存储器单元相关联的第二位线。 存储器件还包括耦合到第一存储器单元并耦合到第二存储器单元的源极线。
-
公开(公告)号：US20090161413A1
公开(公告)日：2009-06-25
申请号：US11959515
申请日：2007-12-19
CPC分类号： G11C11/1675 , G11C11/1659 , G11C11/1673
摘要： In a particular embodiment, a memory device includes a first memory cell and a second memory cell. The memory device also includes a first bit line associated with the first memory cell and a second bit line associated with the second memory cell. The memory device also includes a source line coupled to the first memory cell and coupled to the second memory cell.
摘要翻译： 在特定实施例中，存储器设备包括第一存储器单元和第二存储器单元。 存储器件还包括与第一存储器单元相关联的第一位线和与第二存储器单元相关联的第二位线。 存储器件还包括耦合到第一存储器单元并耦合到第二存储器单元的源极线。
-
-
-
搜索结果
4 条记录 (耗时 0.023 秒)
