公开(公告)号：US09229057B2

公开(公告)日：2016-01-05

申请号：US13484481

申请日：2012-05-31

申请人： Sung Yeol Kim ,  In-su Yang ,  Min Sung Kim ,  Jae Hyun Baek ,  Jin-Kyu Choi ,  Ho Sun Yoo

发明人： Sung Yeol Kim ,  In-su Yang ,  Min Sung Kim ,  Jae Hyun Baek ,  Jin-Kyu Choi ,  Ho Sun Yoo

IPC分类号： G01R31/3183

CPC分类号： G01R31/318371

摘要： A semiconductor test system includes a user device configured to operate a reference device in accordance with an interface signal based on a timing signal having a variable operating frequency, a pattern synthesis apparatus configured to measure an interval between adjacent edges of the timing signal transmitted from the user device, and extract a logic value of the interface signal in accordance with the timing signal so as to generate test pattern data, and a test device configured to receive the test pattern data, reconstruct the timing signal based on the measured interval, generate a test driving signal such that the logic value is extracted from a device under test (DUT) based on the reconstructed timing signal, and apply the test driving signal to the DUT so as to determine an operating state of the DUT.

摘要翻译： 半导体测试系统包括：用户设备，被配置为基于具有可变工作频率的定时信号根据接口信号来操作参考设备;模式合成设备，被配置为测量从所述定时信号发送的定时信号的相邻边缘之间的间隔; 用户设备，并根据定时信号提取接口信号的逻辑值，以产生测试模式数据;以及测试设备，被配置为接收测试模式数据，基于测量的间隔重构定时信号，生成 测试驱动信号，使得基于重构的定时信号从待测器件（DUT）提取逻辑值，并将测试驱动信号施加到DUT，以便确定DUT的操作状态。

公开(公告)号：US20120326738A1

公开(公告)日：2012-12-27

申请号：US13484481

申请日：2012-05-31

申请人： Sung Yeol Kim ,  In-Su Yang ,  Min Sung Kim ,  Jae Hyun Baek ,  Jin-Kyu Choi ,  Ho Sun Yoo

发明人： Sung Yeol Kim ,  In-Su Yang ,  Min Sung Kim ,  Jae Hyun Baek ,  Jin-Kyu Choi ,  Ho Sun Yoo

IPC分类号： G01R31/26

CPC分类号： G01R31/318371

摘要： A semiconductor test system includes a user device configured to operate a reference device in accordance with an interface signal based on a timing signal having a variable operating frequency, a pattern synthesis apparatus configured to measure an interval between adjacent edges of the timing signal transmitted from the user device, and extract a logic value of the interface signal in accordance with the timing signal so as to generate test pattern data, and a test device configured to receive the test pattern data, reconstruct the timing signal based on the measured interval, generate a test driving signal such that the logic value is extracted from a device under test (DUT) based on the reconstructed timing signal, and apply the test driving signal to the DUT so as to determine an operating state of the DUT.

摘要翻译： 半导体测试系统包括：用户设备，被配置为基于具有可变工作频率的定时信号根据接口信号来操作参考设备;模式合成设备，被配置为测量从所述定时信号发送的定时信号的相邻边缘之间的间隔; 用户设备，并根据定时信号提取接口信号的逻辑值，以产生测试模式数据;以及测试设备，被配置为接收测试模式数据，基于测量的间隔重构定时信号，生成 测试驱动信号，使得基于重构的定时信号从待测器件（DUT）提取逻辑值，并将测试驱动信号施加到DUT，以便确定DUT的操作状态。