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公开(公告)号:US20220199630A1
公开(公告)日:2022-06-23
申请号:US17691879
申请日:2022-03-10
发明人: Hung-Yu YE , Chung-Yi LIN , Yun-Ju PAN , Chee-Wee LIU
IPC分类号: H01L27/11 , H01L29/66 , H01L27/092 , H01L29/08 , H01L29/423 , H01L29/786 , H01L23/535 , H01L21/324 , H01L21/8238
摘要: A device includes a first horizontal-gate-all-around (HGAA) transistor, a second HGAA transistor, a first vertical-gate-all-around (VGAA) transistor, and a second VGAA transistor. The first HGAA transistor and the second HGAA transistor are adjacent to each other. The first VGAA transistor is over the first HGAA transistor. The second VGAA transistor is over the second HGAA transistor. A top surface of the first VGAA transistor is substantially coplanar with a top surface of the second VGAA transistor.
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公开(公告)号:US20210366916A1
公开(公告)日:2021-11-25
申请号:US16943916
申请日:2020-07-30
发明人: Hung-Yu YE , Chung-Yi LIN , Yun-Ju PAN , Chee-Wee LIU
IPC分类号: H01L27/11 , H01L27/092 , H01L29/08 , H01L29/423 , H01L29/786 , H01L23/535 , H01L21/324 , H01L21/8238 , H01L29/66
摘要: A device includes a first semiconductor fin, a second semiconductor fin, first source/drain features, second source/drain features, a first gate structure, a second gate structure, a first vertical-gate-all-around (VGAA) transistor, and a second VGAA transistor. The first semiconductor fin and the second semiconductor fin are adjacent to each other. The first source/drain features are on opposite sides of the first semiconductor fin. The second source/drain features are on opposite sides of the second semiconductor fin. The first gate structure is over the first semiconductor fin. The second gate structure is over the second semiconductor fin. The first VGAA transistor is over one of the first source/drain features. The second VGAA transistor is over one of the second source/drain features.
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公开(公告)号:US20220310787A1
公开(公告)日:2022-09-29
申请号:US17372108
申请日:2021-07-09
发明人: Hung-Yu YE , Yu-Shiang HUANG , Chien-Te TU , Chee-Wee LIU
IPC分类号: H01L29/06 , H01L21/8234
摘要: A device comprises source/drain regions over a substrate and spaced apart along a first direction, a first gate structure between the source/drain regions, and a first channel structure surrounded by the first gate structure. The first channel structure comprises alternately stacking first semiconductor layers and second semiconductor layers. When viewed in a cross section taken along a second direction perpendicular to the first direction, central axes of the second semiconductor layers are laterally offset from central axes of the first semiconductor layers.
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