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公开(公告)号：US11798632B2
公开(公告)日：2023-10-24
申请号：US17313404
申请日：2021-05-06
发明人： Manish Arora , Yen-Huei Chen , Hung-Jen Liao , Nikhil Puri , Yu-Hao Hsu
CPC分类号： G11C16/24 , G11C7/12 , G11C11/005 , G11C16/0483 , H10B41/20 , H10B41/35
摘要： A write line circuit includes a power supply node configured to carry a power supply voltage level, a reference node configured to carry a reference voltage level, an output node, first and second switching devices coupled in series between the output node and the power supply node, and a third switching device directly coupled to each of the output node and the reference node. The first switching device is configured to selectively couple the output node to the second switching device responsive to a first data signal, the second switching device is configured to selectively couple the first switching device to the power supply node responsive to a second data signal, and the third switching device is configured to selectively couple the output node to the reference node responsive to the first data signal.
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公开(公告)号：US11011238B2
公开(公告)日：2021-05-18
申请号：US16204268
申请日：2018-11-29
发明人： Manish Arora , Hung-Jen Liao , Yen-Huei Chen , Nikhil Puri , Yu-Hao Hsu
IPC分类号： G11C16/06 , G11C16/24 , H01L27/11551 , G11C7/12 , G11C16/04 , G11C11/00 , H01L27/11524
摘要： A write line circuit includes a power supply node configured to carry a power supply voltage level, a reference node configured to carry a reference voltage level, a first input node configured to receive a first data signal, a second input node configured to receive a second data signal, a third input node configured to receive a control signal, and an output node. The write line circuit is configured to, responsive to the first data signal, the second data signal, and the control signal, either output one of the power supply voltage level or the reference voltage level on the output node, or float the output node.
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