POWER CIRCUIT
    4.
    发明申请

    公开(公告)号:US20210194236A1

    公开(公告)日:2021-06-24

    申请号:US16646024

    申请日:2020-02-25

    Inventor: Jilong Li Yue Wang

    Abstract: A power circuit includes a bleeder circuit, wherein a first terminal of the bleeder circuit is an output terminal, and a second terminal of the bleeder circuit is grounded; a control circuit, wherein a first terminal of the control circuit is connected to the output terminal, a second terminal of the control circuit is a feedback terminal and is connected to the bleeder circuit, and a third terminal of the control circuit is an input terminal; and a feedback capacitor, wherein a first terminal of the feedback capacitor is connected to the output terminal, and a second terminal of the feedback capacitor is connected to the bleeder circuit. The power circuit adds a feedback capacitor between the output terminal and the feedback terminal and can rapidly provide output terminal voltage changes to the feedback terminal and accelerate regulation of an output voltage.

    Display panel
    5.
    发明授权

    公开(公告)号:US11846846B1

    公开(公告)日:2023-12-19

    申请号:US18086680

    申请日:2022-12-22

    CPC classification number: G02F1/133531

    Abstract: A display panel includes a thin film transistor (TFT) array substrate, an opposite substrate, and a liquid crystal layer disposed between the TFT array substrate and the opposite substrate. The TFT array substrate includes a first substrate. The opposite substrate includes a second substrate. The display panel further includes a first viewing-angle improving layer disposed between the first substrate and the second substrate. The first viewing-angle improving layer adjoins one film layer on the first substrate or the second substrate. The first viewing-angle improving layer is disposed between the first substrate and the second substrate so that the first viewing-angle improving layer can be a stacked part manufactured integratedly with other film layers of the display panel. Thus, manufacture of the first viewing-angle improving layer can overcome a size limitation of a mold in a nanoimprinting technology, effectively improving a large-viewing-angle-display effect of a large-size display panel.

    Gate driver on array circuit driving system and display device

    公开(公告)号:US11322107B2

    公开(公告)日:2022-05-03

    申请号:US16621760

    申请日:2019-09-30

    Inventor: Jilong Li Yue Wang

    Abstract: The present disclosure provides a gate driver on array (GOA) circuit driving system and a display panel. The GOA circuit driving system includes a power chip including a plurality of output pins, a plurality of filter units respectively corresponding to the plurality of output pins, and a GOA circuit including a plurality of signal input terminals respectively corresponding to the plurality of output pins, wherein each of the plurality of output pins is electrically connected to the corresponding signal input terminal through the corresponding filter unit, and each of the plurality of filter units is configured to filter an electrostatic voltage transmitted from the corresponding signal input terminal to the corresponding output pin, therefore solving a problem that the power chip cannot work normally due to a release of static electricity from the GOA circuit to the power chip during an ESD test.

    GATE DRIVER ON ARRAY CIRCUIT DRIVING SYSTEM AND DISPLAY DEVICE

    公开(公告)号:US20210366426A1

    公开(公告)日:2021-11-25

    申请号:US16621760

    申请日:2019-09-30

    Inventor: Jilong Li Yue Wang

    Abstract: The present disclosure provides a gate driver on array (GOA) circuit driving system and a display panel. The GOA circuit driving system includes a power chip including a plurality of output pins, a plurality of filter units respectively corresponding to the plurality of output pins, and a GOA circuit including a plurality of signal input terminals respectively corresponding to the plurality of output pins, wherein each of the plurality of output pins is electrically connected to the corresponding signal input terminal through the corresponding filter unit, and each of the plurality of filter units is configured to filter an electrostatic voltage transmitted from the corresponding signal input terminal to the corresponding output pin, therefore solving a problem that the power chip cannot work normally due to a release of static electricity from the GOA circuit to the power chip during an ESD test.

Patent Agency Ranking