公开(公告)号：US20210329776A1

公开(公告)日：2021-10-21

申请号：US17014143

申请日：2020-09-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shabbir AMJHERA WALA ,  Xiaochen XU ,  Dijeesh K ,  Abhishek VISHWA ,  Shriram DEVI ,  Aatish CHANDAK ,  Sanjay DIXIT ,  Elisa Maddalena GRANATA ,  Jun SHEN ,  Sandeep OSWAL

IPC: H05K1/02 ,  H04B10/40 ,  H04B1/40

Abstract: An apparatus comprises a transceiver (Tx/Rx) printed circuit board (PCB) with a top surface and a bottom surface and a power supply PCB. The Tx/Rx PCB includes two transmitter devices, each comprising a number N of channels. A first transmitter device is arranged on the bottom surface and a second transmitter device is arranged on the top surface over the first transmitter device. One or more pins of the second transmitter device are shorted with one or more pins of the first transmitter device with the same function. An analog front end (AFE) device comprising N input channels is arranged on the top surface of the Tx/Rx PCB, and a digital signal processor is coupled to the AFE device. The power supply PCB comprises a power supply module configured to provide a plurality of supply voltages to the Tx/Rx PCB and the power supply PCB.

公开(公告)号：US20240313751A1

公开(公告)日：2024-09-19

申请号：US18589715

申请日：2024-02-28

Applicant: Texas Instruments Incorporated

Inventor： Sachin AITHAL ,  Anand H UDUPA ,  Raja Reddy PATUKURI ,  Sandeep OSWAL ,  Aatish CHANDAK ,  Vignesh SUBRAMANYA ,  Aravind MIRIYALA

IPC: H03K5/1252 ,  A61B5/00 ,  A61B5/349 ,  H03M1/12

CPC classification number: H03K5/1252 ,  A61B5/349 ,  A61B5/7217 ,  H03M1/12

Abstract: A circuit includes an interference frequency tracking circuit, a PLI synthesizer circuit, and a summing circuit. The interference frequency tracking circuit is configured to track a frequency of an interference signal derived from a target signal, and provide a frequency selection value representing the frequency of the interference signal. The PLI synthesizer circuit is configured to generate, based on the frequency selection value, a correction signal at the frequency of the interference signal, adjust a phase of the correction signal to match a phase of the interference signal in the target signal, and adjust an amplitude of the correction signal to match an amplitude of the interference signal in the target signal. The summing circuit is configured to subtract the correction signal from the target signal.