Power converter with multi-mode timing control

    公开(公告)号:US10608532B1

    公开(公告)日:2020-03-31

    申请号:US16425353

    申请日:2019-05-29

    Abstract: A converter circuit includes a power stage circuit configured to convert an input voltage to an output voltage provided at an output, and a control circuit configured to control the power stage circuit. The control circuit is configured to operate in one of a pulse frequency modulation (“PFM”) mode and a pulse width modulation (“PWM”) mode depending on a current supplied to the output. The control circuit includes a multi-mode timer circuit configured to provide a switching signal to set an off time for each switching cycle of the power stage circuit during the PFM mode and during the PWM mode.

    Power converter with multi-mode timing control

    公开(公告)号:US11081957B2

    公开(公告)日:2021-08-03

    申请号:US16781680

    申请日:2020-02-04

    Abstract: A converter circuit includes a power stage circuit configured to convert an input voltage to an output voltage provided at an output, and a control circuit configured to control the power stage circuit. The control circuit is configured to operate in one of a pulse frequency modulation (“PFM”) mode and a pulse width modulation (“PWM”) mode depending on a current supplied to the output. The control circuit includes a multi-mode timer circuit configured to provide a switching signal to set an off time for each switching cycle of the power stage circuit during the PFM mode and during the PWM mode.

    Frequency synchronization for a voltage converter

    公开(公告)号:US11509210B1

    公开(公告)日:2022-11-22

    申请号:US17347177

    申请日:2021-06-14

    Abstract: A device includes a comparator having a first comparator input configured to receive a time signal. The device also includes a subtractor having a subtractor output coupled to a second comparator input, and a first subtractor input adapted to be coupled to a voltage converter terminal. The device also includes a current source having an output coupled to a second subtractor input, and a current source input coupled to the first subtractor input. The device also includes a capacitor coupled to the second subtractor input and to ground. The device also includes a latch having an output and first and second inputs. The latch output is coupled to a control terminal of a transistor in parallel with the capacitor, the first latch input is coupled to the comparator output, and the second latch input is configured to receive a clock signal.

    POWER CONVERTER WITH MULTI-MODE TIMING CONTROL

    公开(公告)号:US20200228009A1

    公开(公告)日:2020-07-16

    申请号:US16781680

    申请日:2020-02-04

    Abstract: A converter circuit includes a power stage circuit configured to convert an input voltage to an output voltage provided at an output, and a control circuit configured to control the power stage circuit. The control circuit is configured to operate in one of a pulse frequency modulation (“PFM”) mode and a pulse width modulation (“PWM”) mode depending on a current supplied to the output. The control circuit includes a multi-mode timer circuit configured to provide a switching signal to set an off time for each switching cycle of the power stage circuit during the PFM mode and during the PWM mode.

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