INTEGRATED TERMINATION FOR MULTIPLE TRENCH FIELD PLATE
    1.
    发明申请
    INTEGRATED TERMINATION FOR MULTIPLE TRENCH FIELD PLATE 有权
    多台TRENCH现场板的集成终止

    公开(公告)号:US20150357461A1

    公开(公告)日:2015-12-10

    申请号:US14299051

    申请日:2014-06-09

    Abstract: A semiconductor device includes a vertical MOS transistor with a plurality of parallel RESURF drain trenches separated by a constant spacing in a vertical drain drift region. The vertical MOS transistor has chamfered corners; each chamfered corner extends across at least five of the drain trenches. A RESURF termination trench surrounds the drain trenches, separated from sides and ends of the drain trenches by distances which are functions of the drain trench spacing. At the chamfered corners, the termination trench includes external corners which extend around an end of a drain trench which extends past an adjacent drain trench, and includes internal corners which extend past an end of a drain trench which is recessed from an adjacent drain trench. The termination trench is separated from the drain trenches at the chamfered corners by distances which are also functions of the drain trench spacing.

    Abstract translation: 半导体器件包括具有在垂直漏极漂移区域中以恒定间隔分开的多个并联RESURF漏极沟槽的垂直MOS晶体管。 垂直MOS晶体管有倒角; 每个倒角都延伸穿过至少五个漏极沟槽。 RESURF端接沟槽围绕漏极沟槽,从漏极沟槽的侧面和端部分离出作为漏极沟槽间隔的函数的距离。 在倒角处,终端沟槽包括围绕漏极沟槽的一端延伸的外部角部,该沟槽延伸穿过相邻的漏极沟槽,并且包括延伸穿过从相邻漏极沟槽凹陷的漏极沟槽的端部的内部角部。 端接沟槽在倒角处与漏极沟槽分开,距离也是漏极沟槽间隔的函数。

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