公开(公告)号：US20210194479A1

公开(公告)日：2021-06-24

申请号：US17194474

申请日：2021-03-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rishubh KHURANA ,  Tanmay NEEMA ,  Kanak Chandra DAS ,  Atul Kumar AGRAWAL

IPC: H03K17/22 ,  H03K17/30 ,  G06F1/24

Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.

公开(公告)号：US20210036701A1

公开(公告)日：2021-02-04

申请号：US16880541

申请日：2020-05-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rishubh KHURANA ,  Tanmay NEEMA ,  Kanak Chandra DAS ,  Atul Kumar AGRAWAL

IPC: H03K17/22 ,  H03K17/30 ,  H03K17/14 ,  G06F1/24 ,  G11C11/4099 ,  G11C11/4074

Abstract: An integrated circuit includes a power-on reset (POR) circuit and a digital logic circuit. The POR has first and second control outputs. The POR circuit is configured to generate a first control signal on the first control output responsive to a supply voltage on the supply voltage node exceeding a first threshold voltage and is configured to generate a second control signal on the second control output responsive to the supply voltage exceeding a second threshold voltage. The digital logic circuit has a first control input coupled to the first control output of the POR circuit and has a second control input coupled to the second control output of the POR circuit. The digital logic circuit is configured to initiate a first read transaction responsive to assertion of the first control signal and to initiate a second read transaction responsive to assertion of the second control signal.