Dual mode switching regulator with PWM/PFM frequency control

    公开(公告)号:US11031869B2

    公开(公告)日:2021-06-08

    申请号:US16745028

    申请日:2020-01-16

    Abstract: A dual mode switching regulator includes a PWM/PFM control architecture with PFM frequency foldback based on extending switching cycle off time TOFF. A controller includes a PWM/PFM clock generator that, in response to assertion of a TOFF control signal, extends the nominal PWM switching cycle off-time TOFFnom for an extended off-time TOFFext (variable), so that switching cycle off-time is [TOFFnom+TOFFext]. A TOFF modulator generates the TOFF control signal based on generating a TOFF control voltage from an ITOFF control current equal to [IPWM-IPFM], generated by sourcing an IPWM reference current, and, in response to a PFM load condition, sinking an IPFM control current. The TOFF control signal is asserted when the TOFF control voltage is not substantially equal to a TOFF reference voltage at the end of TOFFnom, to cause the PWM/PFM clock generator to extend switching cycle off-time to [TOFFnom+TOFFext], with the duration of TOFFext determining PFM switching frequency.

    METHODS, APPARATUS, AND SYSTEMS TO ADJUST TRANSIENT RESPONSE IN A MULTISTAGE SYSTEM

    公开(公告)号:US20200266769A1

    公开(公告)日:2020-08-20

    申请号:US16732235

    申请日:2019-12-31

    Abstract: Methods, apparatus, and systems are disclosed that adjust transient response in a multistage system. An example apparatus includes a first filter including an input configured to be coupled to an output of a master stage, an amplifier, the first input of the amplifier coupled to the input of the first filter, the second input of the amplifier coupled to the output of the first filter, a second filter, the input of the second filter coupled to the output of the amplifier, and a comparator, the first input of the comparator coupled to the input of the first filter circuit, the second input of the comparator coupled to the output of the amplifier, the third input of the comparator coupled to the output of the second filter, and the output of the comparator adapted to be coupled to a latch.

    Methods, apparatus, and systems to adjust transient response in a multistage system

    公开(公告)号:US11545939B2

    公开(公告)日:2023-01-03

    申请号:US16732235

    申请日:2019-12-31

    Abstract: Methods, apparatus, and systems are disclosed that adjust transient response in a multistage system. An example apparatus includes a first filter including an input configured to be coupled to an output of a master stage, an amplifier, the first input of the amplifier coupled to the input of the first filter, the second input of the amplifier coupled to the output of the first filter, a second filter, the input of the second filter coupled to the output of the amplifier, and a comparator, the first input of the comparator coupled to the input of the first filter circuit, the second input of the comparator coupled to the output of the amplifier, the third input of the comparator coupled to the output of the second filter, and the output of the comparator adapted to be coupled to a latch.

    Error amplifier with programmable on-chip and off-chip compensation

    公开(公告)号:US11616436B2

    公开(公告)日:2023-03-28

    申请号:US16782525

    申请日:2020-02-05

    Abstract: A system includes: an input voltage source; a power stage coupled to the input voltage source; a load coupled to an output of the power stage; and an error amplifier circuit coupled to the power stage. The error amplifier circuit includes an error amplifier; a transconductance stage coupled to an output of the error amplifier; an internal compensation switch; an external compensation switch; and control logic coupled to the internal compensation switch and the external compensation switch. The control logic is configured to selectively operate the internal compensation switch and the external compensation switch in one of an internal compensation mode and an external compensation mode.

    DUAL MODE SWITCHING REGULATOR WITH PWM/PFM FREQUENCY CONTROL

    公开(公告)号:US20200274445A1

    公开(公告)日:2020-08-27

    申请号:US16745028

    申请日:2020-01-16

    Abstract: A dual mode switching regulator includes a PWM/PFM control architecture with PFM frequency foldback based on extending switching cycle off time TOFF. A controller includes a PWM/PFM clock generator that, in response to assertion of a TOFF control signal, extends the nominal PWM switching cycle off-time TOFFnom for an extended off-time TOFFext (variable), so that switching cycle off-time is [TOFFnom+TOFFext]. A TOFF modulator generates the TOFF control signal based on generating a TOFF control voltage from an ITOFF control current equal to [IPWM-IPFM], generated by sourcing an IPWM reference current, and, in response to a PFM load condition, sinking an IPFM control current. The TOFF control signal is asserted when the TOFF control voltage is not substantially equal to a TOFF reference voltage at the end of TOFFnom, to cause the PWM/PFM clock generator to extend switching cycle off-time to [TOFFnom+TOFFext], with the duration of TOFFext determining PFM switching frequency.

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