公开(公告)号：US09698779B2

公开(公告)日：2017-07-04

申请号：US14506216

申请日：2014-10-03

Applicant: Texas Instruments Incorporated

Inventor： Devanathan Varadarajan ,  Karthik Srinivasan ,  Neel Talakshi Gala

IPC: G06F7/57 ,  H03K19/00 ,  H03K19/177

CPC classification number: H03K19/0008 ,  H03K19/17752 ,  H03K19/17764

Abstract: Methods for reconfiguring an ASIC at runtime without using voltage over scaling. A functional criticality of a set of logic in the ASIC is identified. Then, the set of logic are classified into a set of regions based on the functional criticality, each region of the set of regions having a target error threshold. Further, each region is power gated at runtime based on the functional criticality such that the target error threshold is achieved without using voltage over scaling.

公开(公告)号：US20150100608A1

公开(公告)日：2015-04-09

申请号：US14506216

申请日：2014-10-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Devanathan Varadarajan ,  Karthik Srinivasan ,  Neel Talakshi Gala

IPC: H03K19/00 ,  G06F7/50 ,  G06F7/52 ,  H03K19/177

CPC classification number: H03K19/0008 ,  H03K19/17752 ,  H03K19/17764

Abstract: Methods for reconfiguring an ASIC at runtime without using voltage over scaling. A functional criticality of a set of logic in the ASIC is identified. Then, the set of logic are classified into a set of regions based on the functional criticality, each region of the set of regions having a target error threshold. Further, each region is power gated at runtime based on the functional criticality such that the target error threshold is achieved without using voltage over scaling.

Abstract translation: 在运行时重新配置ASIC的方法，而不使用电压超标。 识别ASIC中的一组逻辑的功能关键性。 然后，基于功能关键性将该组逻辑分类为一组区域，该区域集合的每个区域具有目标误差阈值。 此外，每个区域在运行时基于功能关键性进行功率门控，使得在不使用电压超标的情况下实现目标误差阈值。