公开(公告)号：US20170317488A1

公开(公告)日：2017-11-02

申请号：US15141365

申请日：2016-04-28

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Pradeep V S R PYDAH ,  Biranchinath SAHU ,  Tetsuo TATEISHI ,  Kuang-Yao CHENG ,  Nandakishore RAIMAR

IPC: H02H7/12 ,  H02H3/087 ,  G06F1/26

CPC classification number: H02H7/1213 ,  G06F1/26 ,  H02H3/087

Abstract: The disclosure provides an over-current protection circuit. A signal generating block in the over-current protection circuit generates one or more input voltages, a summed voltage and an average voltage in response to one or more differential voltages. A control block generates one or more control signals in response to the one or more input voltages and the average voltage. An analog control loop block generates an initiation signal in response to the summed voltage and an output voltage. A phase control logic block generates one or more PWM (pulse width modulated) signals in response to the initiation signal and the one or more control signals.

公开(公告)号：US20210099084A1

公开(公告)日：2021-04-01

申请号：US16586316

申请日：2019-09-27

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kuang-Yao CHENG ,  Muthusubramanian VENKATESWARAN ,  Dattatreya Baragur SURYANARAYANA ,  Preetam Charan Anand Tadeparthy

IPC: H02M3/158 ,  H02M1/00

Abstract: A system includes a load and a switching converter coupled to the load. The switching converter includes at least one switching module and an output inductor coupled to a switch node of each switching module. The switching converter also includes a controller coupled to each switching module, where the controller is configured to adjust a pulse clock rate and a switch on-time for each switching module. The controller comprises a pulse truncation circuit configured to detect a voltage overshoot condition and to truncate an active switch on-time pulse in response to the detected voltage overshoot condition.

公开(公告)号：US20190190386A1

公开(公告)日：2019-06-20

申请号：US15849504

申请日：2017-12-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Kuang-Yao CHENG ,  Wenkai WU ,  Preetam TADEPARTHY ,  Nancy ZHANG ,  Dattatreya Baragur SURYANARAYANA ,  Naga Venkata Prasadu MANGINA

IPC: H02M3/158 ,  H02M3/335 ,  G05F1/565 ,  G06F1/28

Abstract: A circuit for a multi-phase power regulator including a power stage with a first phase and a second phase, the circuit including phase management circuitry coupled to the first phase and the second phase to control the first phase and the second phase, a first comparator coupled to an output of the multi-phase power regulator to compare a value of the output of the multi-phase power regulator to a first threshold value to produce a first comparison result, and phase shedding circuitry coupled to the first comparator and the phase management circuitry to control the phase management circuitry to activate or deactivate the second phase based at least partially on the first comparison result.