公开(公告)号：US20150222658A1

公开(公告)日：2015-08-06

申请号：US14614038

申请日：2015-02-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Hun-Seok KIM ,  Anand Ganesh DABAK ,  Jing-Fei REN ,  Manish GOEL

IPC: H04L29/06 ,  H04L29/08

CPC classification number: H04L63/1466 ,  H04K1/003 ,  H04K3/25 ,  H04K3/46 ,  H04K3/65 ,  H04K3/827 ,  H04K3/86 ,  H04K2203/22 ,  H04L9/3271 ,  H04L67/12 ,  H04L2209/805 ,  H04W12/12

Abstract: An apparatus for preventing a relay attack that includes a microcontroller, a receiver, and a transmitter. The receiver is configured to receive a challenge message from a verifier. The challenge message has a challenge message frequency at a first challenge message frequency during a first time slot. The transmitter is configured to transmit a response message to the verifier. The response message has a response message frequency at a first response message frequency during the first time slot. The first response message frequency is different than the first challenge message frequency. The challenge message frequency is at a second challenge message frequency and the response message frequency is at a second response message frequency during a second time slit. The second challenge message frequency is different than the second response message frequency.

Abstract translation: 一种用于防止包括微控制器，接收器和发射器的中继攻击的装置。 接收器被配置为从验证器接收挑战消息。 挑战消息在第一时隙期间在第一挑战消息频率处具有挑战消息频率。 发送器被配置为向验证者发送响应消息。 响应消息在第一时隙期间具有在第一响应消息频率处的响应消息频率。 第一响应消息频率与第一挑战消息频率不同。 挑战消息频率处于第二挑战消息频率，并且响应消息频率在第二时间缝隙期间处于第二响应消息频率。 第二挑战消息频率与第二响应消息频率不同。

公开(公告)号：US20170038807A1

公开(公告)日：2017-02-09

申请号：US14816940

申请日：2015-08-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Clive BITTLESTONE ,  Joyce KWONG ,  Manish GOEL

IPC: G06F1/26

CPC classification number: G06F1/26 ,  G06F21/73 ,  G11C8/12 ,  G11C11/419 ,  G11C16/20 ,  G11C2029/4402 ,  G11C2029/5002 ,  H04L9/3278

Abstract: Methods and apparatus for creating a physically unclonable function for SRAM are disclosed. An example method includes decreasing a supply voltage of a memory array to a first voltage level, the first voltage level being below a normal operating voltage associated with the memory array, reading a first value of a bit cell after the supply voltage has been at the first voltage level, and determining a function based on the first value of the bit cell and a second value, the second value stored in the bit cell when the memory array is operating at a voltage level above the first voltage level, the function to represent an identification of a circuit including the memory array.

Abstract translation: 公开了用于为SRAM创建物理不可克隆功能的方法和装置。 一种示例性方法包括将存储器阵列的电源电压降低到第一电压电平，第一电压电平低于与存储器阵列相关联的正常工作电压，在电源电压已经处于位置之后读取位单元的第一值 第一电压电平，以及基于所述位单元的第一值确定功能和第二值，所述第二值存储在所述位单元中，当所述存储器阵列在高于所述第一电压电平的电压电平下操作时，所述函数表示 包括存储器阵列的电路的识别。

公开(公告)号：US20170017808A1

公开(公告)日：2017-01-19

申请号：US14798067

申请日：2015-07-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Joyce KWONG ,  Clive BITTLESTONE ,  Manish GOEL

IPC: G06F21/73 ,  G11C11/419

CPC classification number: G06F21/73 ,  G09C1/00 ,  G11C11/419 ,  G11C29/50012 ,  G11C2029/4402 ,  G11C2029/5002 ,  H04L9/3278

Abstract: Methods and apparatus for creating a physically unclonable function for SRAM are disclosed. An example method includes after applying a voltage to a memory array: determining a first duration between the applying of the voltage and a first output of a first bit cell, the first output corresponding to a first value stored in the first bit cell, and determining a second duration between the applying of the voltage and a second output of a second bit cell, the second output corresponding to a second value stored in the second bit cell. The example method further includes determining a function based on a comparison of the first duration and the second duration, the function to establish an identification of a circuit that includes the memory array.

Abstract translation: 公开了用于为SRAM创建物理不可克隆功能的方法和装置。 示例性方法包括在向存储器阵列施加电压之后：确定施加电压和第一位单元的第一输出之间的第一持续时间，第一输出对应于存储在第一位单元中的第一值，以及确定 在施加电压和第二位单元的第二输出之间的第二持续时间，所述第二输出对应于存储在所述第二位单元中的第二值。 示例性方法还包括基于第一持续时间和第二持续时间的比较来确定功能，建立包括存储器阵列的电路的标识的功能。