公开(公告)号：US20240193112A1

公开(公告)日：2024-06-13

申请号：US18581522

申请日：2024-02-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Brian Jason KARGUTH ,  Charles Lance FUOCO ,  Samuel Paul VISALLI ,  Michael Anthony DENIO

IPC: G06F13/28 ,  G06F13/40

CPC classification number: G06F13/28 ,  G06F13/4027

Abstract: An integrated circuit (IC) includes first and second memory devices and a bridge. The IC also includes a first interconnect segment coupled between the first memory device and the bridge. The IC further includes a second interconnect segment coupled between the first and second memory devices, and a third interconnect segment coupled between the bridge and the second memory device. The IC includes a first DMA circuit coupled to the first interconnect segment, and a second DMA circuit coupled to the second interconnect segment. A fourth interconnect segment is coupled between the first and second DMA circuits.

公开(公告)号：US20230042413A1

公开(公告)日：2023-02-09

申请号：US17971707

申请日：2022-10-24

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Brian Jason KARGUTH ,  Charles Lance FUOCO ,  Samuel Paul VISALLI ,  Michael Anthony DENIO

IPC: G06F13/28 ,  G06F13/40

Abstract: An integrated circuit (IC) includes first and second memory devices and a bridge. The IC also includes a first interconnect segment coupled between the first memory device and the bridge. The IC further includes a second interconnect segment coupled between the first and second memory devices, and a third interconnect segment coupled between the bridge and the second memory device. The IC includes a first DMA circuit coupled to the first interconnect segment, and a second DMA circuit coupled to the second interconnect segment. A fourth interconnect segment is coupled between the first and second DMA circuits.

公开(公告)号：US20210073150A1

公开(公告)日：2021-03-11

申请号：US17099896

申请日：2020-11-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Brian Jason KARGUTH ,  Charles Lance FUOCO ,  Samuel Paul VISALLI ,  Michael Anthony DENIO

IPC: G06F13/28 ,  G06F13/40

Abstract: An integrated circuit (IC) includes first and second memory devices and a bridge. The IC also includes a first interconnect segment coupled between the first memory device and the bridge. The IC further includes a second interconnect segment coupled between the first and second memory devices, and a third interconnect segment coupled between the bridge and the second memory device. The IC includes a first DMA circuit coupled to the first interconnect segment, and a second DMA circuit coupled to the second interconnect segment. A fourth interconnect segment is coupled between the first and second DMA circuits.