DC-DC converter with pulse modulation control circuit

    公开(公告)号:US11569743B2

    公开(公告)日:2023-01-31

    申请号:US17116794

    申请日:2020-12-09

    Abstract: A DC-DC converter control circuit includes an error amplifier, a voltage-to-current conversion circuit, an oscillator circuit, and a pulse frequency modulation (PFM) control circuit. The error amplifier is configured to generate a difference voltage as a difference of an output voltage of the DC-DC converter circuit and a reference voltage. The voltage-to-current conversion circuit configured to convert the difference voltage to a difference current. The oscillator circuit is configured to generate a clock signal at a predetermined frequency for pulse width modulation. The PFM control circuit is configured to disable the oscillator circuit, based on the difference current, for PFM operation.

    MAXIMUM VOLTAGE SELECTOR CIRCUIT HAVING ADAPTIVE CURRENT BIAS GENERATOR

    公开(公告)号:US20220091625A1

    公开(公告)日:2022-03-24

    申请号:US17399310

    申请日:2021-08-11

    Abstract: A voltage selector circuit includes a voltage comparator, a multiplexer, and an adaptive current bias generator. The voltage comparator receives first and second input voltages, and outputs a comparator signal based on the first and second input voltages. The multiplexer selects a larger of the first and second input voltages in time based on first comparator signal. The adaptive current bias generator generates a bias current for the voltage comparator during a transition from a first state to a second state. The first input voltage is continuously larger than the second input voltage during the first state, and the second input voltage is continuously larger than the first input voltage in the second state. The bias current during the transition has a time-varying current level that is proportional to a time-varying difference between the first input voltage and the second input voltage during the transition.

    Maximum voltage selector circuit having adaptive current bias generator

    公开(公告)号:US11809210B2

    公开(公告)日:2023-11-07

    申请号:US17399310

    申请日:2021-08-11

    Abstract: A voltage selector circuit includes a voltage comparator, a multiplexer, and an adaptive current bias generator. The voltage comparator receives first and second input voltages, and outputs a comparator signal based on the first and second input voltages. The multiplexer selects a larger of the first and second input voltages in time based on first comparator signal. The adaptive current bias generator generates a bias current for the voltage comparator during a transition from a first state to a second state. The first input voltage is continuously larger than the second input voltage during the first state, and the second input voltage is continuously larger than the first input voltage in the second state. The bias current during the transition has a time-varying current level that is proportional to a time-varying difference between the first input voltage and the second input voltage during the transition.

    Power converter control with snooze mode

    公开(公告)号:US11764690B2

    公开(公告)日:2023-09-19

    申请号:US17713107

    申请日:2022-04-04

    CPC classification number: H02M3/33569 H02M1/0035 H02M1/0041 H02M1/083

    Abstract: A control signal generator includes an error amplifier, a first comparator, a second comparator, a logic circuit and a pulse generator. The error amplifier has a first output, a first input, a second input and a first snooze input. The first comparator has a second output, a third input and a fourth input. The third input is coupled to the first output. The second comparator has a third output, a fifth input, a sixth input and a second snooze input. The fifth input is coupled to the third input. The logic circuit has a fourth output and logic circuit inputs, including a first logic circuit input coupled to the second output. The pulse generator has a fifth output and a seventh input. The seventh input is coupled to the fourth output. A snooze mode controller has a sixth output coupled to the first snooze input and the second snooze input.

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