公开(公告)号：US11290089B2

公开(公告)日：2022-03-29

申请号：US16934342

申请日：2020-07-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Subrahmanya Bharathi Akondy ,  Nirav Ginwala

IPC: H03K7/08 ,  H03K5/04 ,  H03K3/017

Abstract: A circuit includes a base pulse generator to generate a first pulse width modulated (PWM) pulse, a first clock generation circuit to generate M clocks of a first frequency and phase-shifted with respect to each other, and a second clock generation circuit to receive the M clocks and to generate N clocks each at a second lower frequency and the M clocks are phase-shifted with respect to each other. Each of a plurality of flip-flops includes a clock input to receive a different one of the N clocks, a data input coupled to receive the first PWM pulse, and a flip-flop output. A selection circuit includes a plurality of inputs and a selection circuit output. Each of the plurality of inputs is coupled to a corresponding flip-flop output. The selection circuit provides, responsive to a control signal, a selected one of the flip-flop outputs as the selection circuit output.

公开(公告)号：US10763831B2

公开(公告)日：2020-09-01

申请号：US16209615

申请日：2018-12-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Subrahmanya Bharathi Akondy ,  Nirav Ginwala

IPC: H03K3/017 ,  H03K7/08 ,  H03K5/04

Abstract: A circuit includes a base pulse generator to generate a first pulse width modulated (PWM) pulse, a first clock generation circuit to generate M clocks of a first frequency and phase-shifted with respect to each other, and a second clock generation circuit to receive the M clocks and to generate N clocks each at a second lower frequency and the M clocks are phase-shifted with respect to each other. Each of a plurality of flip-flops includes a clock input to receive a different one of the N clocks, a data input coupled to receive the first PWM pulse, and a flip-flop output. A selection circuit includes a plurality of inputs and a selection circuit output. Each of the plurality of inputs is coupled to a corresponding flip-flop output. The selection circuit provides, responsive to a control signal, a selected one of the flip-flop outputs as the selection circuit output.