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公开(公告)号：US09811112B2
公开(公告)日：2017-11-07
申请号：US14997862
申请日：2016-01-18
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Subrahmanya Bharathi Akondy , Steven Brett Larimore
IPC: G06F1/12
CPC classification number: G06F1/12
Abstract: A system includes a CPU, a serial interface, and an adaptive clock delay compensator. The adaptive clock delay compensator is configured to generate a clock signal at a first frequency, detect an edge on a data signal, and count the number of clock cycles of a counter clock to measure the delay between an edge of the clock signal and the detected edge on the data signal to produce a first delay value. The CPU is configured to convert the first delay value to a different clock domain at a second frequency to produce a converted delay value, and initiate a data transfer operation using the second frequency as a clock signal. The adaptive clock delay compensator is configured to generate a delayed clock signal at the second frequency to the serial interface that is delayed from the clock signal at the second frequency by the converted delay value.
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公开(公告)号：US20140355309A1
公开(公告)日：2014-12-04
申请号：US14295045
申请日：2014-06-03
Applicant: Texas Instruments Incorporated
Inventor： Subrahmanya Bharathi Akondy , Hrishikesh Nene
IPC: H02M3/335
CPC classification number: H02M3/335 , H02M1/083 , H02M2001/0054 , Y02B70/1491
Abstract: A selected-parameter adaptively switched power conversion system, for example, includes a counter for determining a period of an output oscillation a power supply switch, where the output oscillation starts when an output current generated by stored power of the power supply coil decays substantially to zero. An event generator for generating a switching delay event in response to the determined output oscillation period and generates a switching delay event in response to a determination of a phase of the output oscillation.
Abstract translation: 选择参数自适应切换电力转换系统例如包括用于确定电源开关的输出振荡的周期的计数器，其中当由供电线圈的存储电力产生的输出电流基本上衰减到 零。 一种事件发生器，用于响应于确定的输出振荡周期产生开关延迟事件，并且响应于输出振荡的相位的确定而产生开关延迟事件。
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公开(公告)号：US10886900B2
公开(公告)日：2021-01-05
申请号：US16700692
申请日：2019-12-02
Applicant: Texas Instruments Incorporated
IPC: H03K3/017
Abstract: In described examples, a method of generating a pulse width modulation (PWM) signal includes repeatedly master control counting, by a master control counter generator, which includes one or both of incrementing and decrementing a master control counter with a minimum value and a maximum value, and repeatedly slave control counting with a phase delay with respect to the master control counting, and during a transition period, slave control counting to a new maximum value or a new phase delay. A maximum count of the transition period is selected to result in the transition period reaching the minimum value at the new phase delay count. The PWM signal is generated by generating rising edges when the slave control counter reaches a rising edge threshold, and generating falling edges when the slave control counter reaches a falling edge threshold.
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公开(公告)号：US20200350894A1
公开(公告)日：2020-11-05
申请号：US16700692
申请日：2019-12-02
Applicant: Texas Instruments Incorporated
IPC: H03K3/017
Abstract: In described examples, a method of generating a pulse width modulation (PWM) signal includes repeatedly master control counting, by a master control counter generator, which includes one or both of incrementing and decrementing a master control counter with a minimum value and a maximum value, and repeatedly slave control counting with a phase delay with respect to the master control counting, and during a transition period, slave control counting to a new maximum value or a new phase delay. A maximum count of the transition period is selected to result in the transition period reaching the minimum value at the new phase delay count. The PWM signal is generated by generating rising edges when the slave control counter reaches a rising edge threshold, and generating falling edges when the slave control counter reaches a falling edge threshold.
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公开(公告)号：US10763831B2
公开(公告)日：2020-09-01
申请号：US16209615
申请日：2018-12-04
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Subrahmanya Bharathi Akondy , Nirav Ginwala
Abstract: A circuit includes a base pulse generator to generate a first pulse width modulated (PWM) pulse, a first clock generation circuit to generate M clocks of a first frequency and phase-shifted with respect to each other, and a second clock generation circuit to receive the M clocks and to generate N clocks each at a second lower frequency and the M clocks are phase-shifted with respect to each other. Each of a plurality of flip-flops includes a clock input to receive a different one of the N clocks, a data input coupled to receive the first PWM pulse, and a flip-flop output. A selection circuit includes a plurality of inputs and a selection circuit output. Each of the plurality of inputs is coupled to a corresponding flip-flop output. The selection circuit provides, responsive to a control signal, a selected one of the flip-flop outputs as the selection circuit output.
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Patent Agency Ranking
公开(公告)号：US09608525B2
公开(公告)日：2017-03-28
申请号：US14295045
申请日：2014-06-03
Applicant: Texas Instruments Incorporated
Inventor： Subrahmanya Bharathi Akondy , Hrishikesh Nene
CPC classification number: H02M3/335 , H02M1/083 , H02M2001/0054 , Y02B70/1491
Abstract: A selected-parameter adaptively switched power conversion system, for example, includes a counter for determining a period of an output oscillation a power supply switch, where the output oscillation starts when an output current generated by stored power of the power supply coil decays substantially to zero. An event generator for generating a switching delay event in response to the determined output oscillation period and generates a switching delay event in response to a determination of a phase of the output oscillation.
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公开(公告)号：US11108327B2
公开(公告)日：2021-08-31
申请号：US15427694
申请日：2017-02-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Subrahmanya Bharathi Akondy , Hrishikesh Nene
Abstract: A selected-parameter adaptively switched power conversion system, for example, includes a counter for determining a period of an output oscillation a power supply switch, where the output oscillation starts when an output current generated by stored power of the power supply coil decays substantially to zero. An event generator for generating a switching delay event in response to the determined output oscillation period and generates a switching delay event in response to a determination of a phase of the output oscillation.
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公开(公告)号：US10530344B1
公开(公告)日：2020-01-07
申请号：US16399394
申请日：2019-04-30
Applicant: Texas Instruments Incorporated
IPC: H03K3/017
Abstract: In described examples, a method of generating a pulse width modulation (PWM) signal includes repeatedly master control counting, by a master control counter generator, which includes one or both of incrementing and decrementing a master control counter with a minimum value and a maximum value, and repeatedly slave control counting with a phase delay with respect to the master control counting, and during a transition period, slave control counting to a new maximum value or a new phase delay. A maximum count of the transition period is selected to result in the transition period reaching the minimum value at the new phase delay count. The PWM signal is generated by generating rising edges when the slave control counter reaches a rising edge threshold, and generating falling edges when the slave control counter reaches a falling edge threshold.
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公开(公告)号：US20170155326A1
公开(公告)日：2017-06-01
申请号：US15427694
申请日：2017-02-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Subrahmanya Bharathi Akondy , Hrishikesh Nene
CPC classification number: H02M3/335 , H02M1/083 , H02M2001/0054 , Y02B70/1491
Abstract: A selected-parameter adaptively switched power conversion system, for example, includes a counter for determining a period of an output oscillation a power supply switch, where the output oscillation starts when an output current generated by stored power of the power supply coil decays substantially to zero. An event generator for generating a switching delay event in response to the determined output oscillation period and generates a switching delay event in response to a determination of a phase of the output oscillation.
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公开(公告)号：US11888482B2
公开(公告)日：2024-01-30
申请号：US17565110
申请日：2021-12-29
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Chen Jiang , Shamim Choudhury , Subrahmanya Bharathi Akondy
Abstract: A system comprises a first comparator, a second comparator, a pulse-width modulation (PWM) controller, and a ramp generator. The first comparator has a positive input coupled to a first ramp output of the ramp generator and a negative input configured to receive an input voltage. The second comparator has a positive input configured to receive the input voltage and a negative input coupled to a second ramp output of the ramp generator. The PWM controller is coupled to outputs and control signal inputs of the first and second comparators and has a control output. In some implementations, the ramp generator generates a high-side falling ramp for the first comparator and a low-side rising ramp for the second comparator. In some implementations, the ramp generator includes a first ramp generator for the high-side falling ramp and a second ramp for the low-side rising ramp.
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