公开(公告)号：US20180212615A1

公开(公告)日：2018-07-26

申请号：US15927510

申请日：2018-03-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Paul STULIK

IPC: H03M1/12 ,  H03M1/40 ,  H03M1/08 ,  H02M3/07 ,  H03M1/06

CPC classification number: H03M1/124 ,  H02M3/07 ,  H03M1/06 ,  H03M1/0863 ,  H03M1/403

Abstract: An input sampling stage circuit includes, a precharge buffer, a precharge switch-capacitor circuit, and an input sampling capacitor. The precharge buffer is configured to buffer an input voltage. The precharge switch-capacitor circuit includes a plurality of switches, a first capacitor, and a second capacitor configured such that the first and second capacitors are connected in series during a coarse sampling time and in parallel during a fine sampling time and charge transfer time. The input sampling capacitor is configured to sample the input voltage through the precharge switch-capacitor circuit during the coarse sampling time and sample the input voltage directly during the fine sampling time.

公开(公告)号：US20220093507A1

公开(公告)日：2022-03-24

申请号：US17540447

申请日：2021-12-02

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Poornika FERNANDES ,  Ye SHAO ,  Guruvayurappan S. MATHUR ,  John K. ARCH ,  Paul STULIK

IPC: H01L23/522 ,  H01G15/00

Abstract: An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.

公开(公告)号：US20210074629A1

公开(公告)日：2021-03-11

申请号：US16561593

申请日：2019-09-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Poornika FERNANDES ,  Ye SHAO ,  Guruvayurappan S. MATHUR ,  John K. ARCH ,  Paul STULIK

IPC: H01L23/522 ,  H01G15/00

Abstract: An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.

公开(公告)号：US20170077803A1

公开(公告)日：2017-03-16

申请号：US15260602

申请日：2016-09-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Paul STULIK

IPC: H02M3/07

CPC classification number: H03M1/124 ,  H02M3/07 ,  H03M1/06 ,  H03M1/0863 ,  H03M1/403

Abstract: An input sampling stage circuit includes, a precharge buffer, a precharge switch-capacitor circuit, and an input sampling capacitor. The precharge buffer is configured to buffer an input voltage. The precharge switch-capacitor circuit includes a plurality of switches, a first capacitor, and a second capacitor configured such that the first and second capacitors are connected in series during a coarse sampling time and in parallel during a fine sampling time and charge transfer time. The input sampling capacitor is configured to sample the input voltage through the precharge switch-capacitor circuit during the coarse sampling time and sample the input voltage directly during the fine sampling time.

Abstract translation: 输入采样级电路包括预充电缓冲器，预充电开关电容器电路和输入采样电容器。 预充电缓冲器被配置为缓冲输入电压。 预充电开关电容电路包括多个开关，第一电容器和第二电容器，其被配置为使得第一和第二电容器在粗采样时间期间串联连接，并且在精细采样时间和电荷转移时间期间并联连接。 输入采样电容器被配置为在粗采样时间内通过预充电开关电容器电路对输入电压进行采样，并在精细采样时间内直接对输入电压进行采样。