公开(公告)号：US20210281167A1

公开(公告)日：2021-09-09

申请号：US17193724

申请日：2021-03-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Pavol BALAZ

IPC: H02M1/44 ,  H02M3/335

Abstract: A system includes a switching power converter, including a first transistor having a first gate, a first drain, and a first source, the first drain adapted to be coupled to a power supply. The switching power converter also includes a second transistor having a second gate, a second drain, and a second source, the second gate coupled to a second gate driver, the second source adapted to be coupled to ground, and the second drain coupled to the first source. The switching power converter also includes a third transistor having a third gate, a third drain, and a third source, the third gate adapted to be coupled to a current source, the third source coupled to a resistor, and the third drain coupled to the first gate. The switching power converter includes a capacitor coupled to the first drain and adapted to be coupled to the current source.

公开(公告)号：US20250070635A1

公开(公告)日：2025-02-27

申请号：US18453776

申请日：2023-08-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Raul BLECIC ,  Syed Wasif MEHDI ,  Pavol BALAZ

IPC: H02M1/00 ,  H03K17/687 ,  H03K19/003

Abstract: A circuit includes a high-side driver having a high-side slew control input, a high-side drive input and a high-side drive output. A low-side driver has a low-side slew control input, a low-side drive input and a low-side drive output. Drive control circuitry has a high-side drive control output, a low-side drive control output, and a slew control output. The high-side drive control output is coupled to the high-side drive input, the low-side drive control output is coupled to the low-side drive input. The slew control output is coupled to at least one of the high-side slew control input and the low-side slew control input, and the drive control circuitry is configured to provide a slew control signal at the slew control output. The high-side and/or low-side driver is configured to modulate a slew rate of a drive signal at a respective drive output thereof based on the slew control signal.

公开(公告)号：US20230231471A1

公开(公告)日：2023-07-20

申请号：US18191916

申请日：2023-03-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Pavol BALAZ

IPC: H02M1/44 ,  H02M1/08

CPC classification number: H02M1/44 ,  H02M1/08

Abstract: A system includes a switching power converter, including a first transistor having a first gate, a first drain, and a first source, the first drain adapted to be coupled to a power supply. The switching power converter also includes a second transistor having a second gate, a second drain, and a second source, the second gate coupled to a second gate driver, the second source adapted to be coupled to ground, and the second drain coupled to the first source. The switching power converter also includes a third transistor having a third gate, a third drain, and a third source, the third gate adapted to be coupled to a current source, the third source coupled to a resistor, and the third drain coupled to the first gate. The switching power converter includes a capacitor coupled to the first drain and adapted to be coupled to the current source.

公开(公告)号：US20200169168A1

公开(公告)日：2020-05-28

申请号：US16690034

申请日：2019-11-20

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Pavol BALAZ ,  Hongcheng XU ,  Ferdinand STETTNER

IPC: H02M3/07

Abstract: Aspects of the disclosure provide for a circuit. In some examples, the circuit includes a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. The first transistor comprises a drain terminal coupled to an input voltage node, a source terminal coupled to a first node, and a gate terminal coupled to a second node. The second transistor comprises a drain terminal coupled to a third node, a source terminal coupled to a fourth node, and a gate terminal coupled to a fifth node. The third transistor comprises a drain terminal coupled to a sixth node, a source terminal configured to couple to a gate terminal of a switching transistor, and a gate terminal coupled to a seventh node. The first capacitor is coupled between the first node and the third node. The second capacitor is coupled between the fourth node and the sixth node.