公开(公告)号：US20210310863A1

公开(公告)日：2021-10-07

申请号：US17348976

申请日：2021-06-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rakul VISWANATH ,  Nagesh SURENDRANATH ,  Sandeep Kesrimal OSWAL ,  Ratna Kumar Venkata PARUPUDI

IPC: G01J1/44

Abstract: A dark current compensation circuit comprises a first comparator having inputs for a detection signal and a first voltage, and a second comparator having inputs for the detection signal and a second voltage. The dark current compensation circuit also comprises a controller coupled to the first and second comparators, which has an input for an event signal. An adjustable current source is coupled to the controller and configured to generate a compensation current. The controller adjusts a value of the compensation current based on the first and second comparator outputs and maintains a constant value in response to the event signal indicating photons incident on a photon detector. In some implementations, the dark current compensation circuit further comprises an analog sub-circuit coupled to the adjustable current source and configured to receive the detection signal. The analog sub-circuit generates an analog compensation current in response to the detection signal.

公开(公告)号：US20170041013A1

公开(公告)日：2017-02-09

申请号：US15231415

申请日：2016-08-08

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Viswanathan NAGARAJAN ,  Srinivas Kumar Reddy NARU ,  Ratna Kumar Venkata PARUPUDI

IPC: H03M1/10 ,  H03M1/20

CPC classification number: H03M1/0641 ,  H03M1/168

Abstract: A system includes an analog-to-digital converter (ADC) including an ADC input terminal; an ADC output terminal; and analog components configured to convert an analog signal received at the ADC input terminal to a digital signal. The system also includes a histogram estimation circuit coupled to the ADC output terminal and configured to generate information on a plurality of codes generated by the ADC and determine a region defining a range of codes corresponding to an occurrence of an error caused by the analog components of the ADC. The system also includes a dither circuit coupled to the ADC input terminal and configured to introduce a dither in the analog signal to generate a modified analog signal.

Abstract translation: 系统包括包括ADC输入端的模数转换器（ADC）; 一个ADC输出端; 以及被配置为将在ADC输入端接收的模拟信号转换成数字信号的模拟部件。 该系统还包括耦合到ADC输出端并被配置为生成关于由ADC产生的多个代码的信息的直方图估计电路，并且确定一个区域，该区域对应于由模拟分量引起的误差的发生 ADC。 该系统还包括耦合到ADC输入端并被配置为在模拟信号中引入抖动以产生经修改的模拟信号的抖动电路。

公开(公告)号：US20210088680A1

公开(公告)日：2021-03-25

申请号：US17114962

申请日：2020-12-08

Applicant: Texas Instruments Incorporated

Inventor： Rakul VISWANATH ,  Nagesh SURENDRANATH ,  Sandeep Kesrimal OSWAL ,  Ratna Kumar Venkata PARUPUDI

IPC: G01T1/24 ,  A61B6/03 ,  A61B6/00 ,  H03F3/70

Abstract: In described examples, a charge sensitive amplifier (CSA) generates an integrated signal in response to a current signal. A high pass filter is coupled to the CSA and receives the integrated signal and an inverse of an event signal, the high pass filter generates a coarse signal. An active comparator is coupled to the high pass filter and receives the coarse signal and a primary reference voltage signal, the active comparator generates the event signal.

公开(公告)号：US20200225370A1

公开(公告)日：2020-07-16

申请号：US16247639

申请日：2019-01-15

Applicant: Texas Instruments Incorporated

Inventor： Rakul VISWANATH ,  Nagesh SURENDRANATH ,  Sandeep Kesrimal OSWAL ,  Ratna Kumar Venkata PARUPUDI

IPC: G01T1/24 ,  A61B6/03 ,  H03F3/70 ,  A61B6/00

Abstract: In described examples, a charge sensitive amplifier (CSA) generates an integrated signal in response to a current signal. A high pass filter is coupled to the CSA and receives the integrated signal and an inverse of an event signal, the high pass filter generates a coarse signal. An active comparator is coupled to the high pass filter and receives the coarse signal and a primary reference voltage signal, the active comparator generates the event signal.