LOW DROPOUT REGULATOR (LDO) CIRCUIT WITH SMOOTH PASS TRANSISTOR PARTITIONING

    公开(公告)号:US20200285261A1

    公开(公告)日:2020-09-10

    申请号:US16810108

    申请日:2020-03-05

    Abstract: A system includes a battery. The system also includes a low dropout regulator (LDO) circuit with an input coupled to the battery and the LDO circuit. The system also includes a load coupled to an output of the LDO circuit. The LDO circuit includes an error amplifier and a control circuit coupled to the error amplifier. The LDO circuit also includes a first pass transistor coupled to the control circuit and configured to provide a first pass current as a function of load current according to a first continuous conduction curve. The LDO circuit also includes a second pass transistor coupled to the control circuit and configured to provide a second pass current as a function of load current according to a second continuous conduction curve.

    REDUCED QUIESCENT CURRENT PVT COMPENSATED OSCILLATOR

    公开(公告)号:US20200228101A1

    公开(公告)日:2020-07-16

    申请号:US16742030

    申请日:2020-01-14

    Abstract: A device includes a capacitor having a first terminal coupled to a ground node, and a second terminal; a first transistor having a source coupled to the capacitor, a drain coupled to a first node, and a gate; a first current source coupled to the first node and configured to couple to a regulated supply node; a second transistor having a source coupled to the ground node, a drain coupled to a second node, and a gate coupled to the second node and to the gate of the first transistor; and a comparator circuit having an input coupled to the first node and an output configured to couple to a clock node.

    LOW DROPOUT REGULATOR (LDO) WITH FREQUENCY-DEPENDENT RESISTANCE DEVICE FOR POLE TRACKING COMPENSATION

    公开(公告)号:US20190258282A1

    公开(公告)日:2019-08-22

    申请号:US16184414

    申请日:2018-11-08

    Abstract: A system includes a low dropout regulator (LDO) circuit. The LDO circuit includes an error amplifier with an input node, a reference node, and an output node. The LDO circuit also includes a pass transistor with a control terminal, a first current terminal, and a second current terminal. The control terminal is coupled to the output node of the error amplifier, the first current terminal is coupled to a voltage source node, and the second current terminal is coupled to an LDO output node. The LDO output node is coupled to the input node of the error amplifier. The LDO circuit also includes a switched-capacitor network coupled between error amplifier and the pass transistor. The switched-capacitor network comprises a pair of switches and a current-controlled oscillator coupled to control terminals of the switches.

    COMPENSATION SLOPE ADJUSTMENT IN VOLTAGE CONVERTER

    公开(公告)号:US20230031749A1

    公开(公告)日:2023-02-02

    申请号:US17390015

    申请日:2021-07-30

    Abstract: A method includes receiving a first indication of an inductor current provided by a voltage converter. The method also includes, responsive to a ratio of a rate of change of the first indication to a rate of change of a compensation ramp being greater than a threshold value, providing a second indication to the ramp generator. The compensation ramp is provided by a ramp generator to control the voltage converter. The second indication is configured to cause the ramp generator to increase an absolute value of the rate of change of the compensation ramp. The method also includes, responsive to the ratio being less than the threshold value, providing a third indication to the ramp generator. The third indication is configured to cause the ramp generator to decrease the absolute value of the rate of change of the compensation ramp.

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