公开(公告)号：US20180175728A1

公开(公告)日：2018-06-21

申请号：US15847383

申请日：2017-12-19

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rejin KANJAVALAPPIL RAVEENDRANATH ,  Sudhir POLAROUTHU ,  Jasjot Singh CHADHA

IPC: H02M3/156 ,  H02M1/08

CPC classification number: H02M3/156 ,  H02M1/08 ,  H02M2001/0009 ,  H02M2001/0048 ,  Y02B70/1491

Abstract: A power supply, comprising a controller comprising a first switch coupled between a first node and a second node, a first resistor coupled between the second node and a third node, a second resistor coupled between the first node and a fourth node, a capacitor coupled between the fourth node and a fifth node, an amplifier coupled at a first input to the fourth node, at a second input to the third node, and at an output to the fifth node, and a comparator coupled at a first input to the fifth node and at a second input to the third node.

公开(公告)号：US20180181158A1

公开(公告)日：2018-06-28

申请号：US15811904

申请日：2017-11-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rejin KANJAVALAPPIL RAVEENDRANATH

IPC: G05F5/00

CPC classification number: G05F5/00

Abstract: In some embodiments, a startup current limiter comprises a first comparator, a second comparator, on time circuitry coupled to an output of the second comparator, and a first logic structure coupled to the output of the second comparator and an output of the on time circuitry. In some embodiments, the startup current limiter further comprises sequencing logic coupled to an output of the first comparator, a latch coupled to an output of the first comparator at a set terminal of the latch and an output of the second comparator at a reset terminal of the latch, off time circuitry coupled to an output terminal of the latch, a second logic structure coupled to the latch and the off time circuitry, and a gate driver coupled to the second logic structure and an output of the sequencing logic.

公开(公告)号：US20240297643A1

公开(公告)日：2024-09-05

申请号：US18241025

申请日：2023-08-31

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Shaik BASHA ,  Rejin KANJAVALAPPIL RAVEENDRANATH ,  Asish DAS

IPC: H03K17/08

CPC classification number: H03K17/08 ,  H03K19/21 ,  H04R3/007

Abstract: A circuit includes a driver circuit. The driver circuit includes a power stage and an overcurrent control circuit. The power stage includes an output switch. The overcurrent control circuit includes a switch control circuitry and overcurrent detection circuitry. The switch control circuitry is configured to: receive a first control signal; and provide a second control signal to a control terminal of the output switch responsive to a delay interval relative to the first control signal and overcurrent detection results obtained by the overcurrent detection circuitry during the delay interval.

公开(公告)号：US20180314286A1

公开(公告)日：2018-11-01

申请号：US16027542

申请日：2018-07-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Rejin KANJAVALAPPIL RAVEENDRANATH

IPC: G05F5/00

CPC classification number: G05F5/00

Abstract: In some embodiments, a startup current limiter comprises a first comparator, a second comparator, on time circuitry coupled to an output of the second comparator, and a first logic structure coupled to the output of the second comparator and an output of the on time circuitry. In some embodiments, the startup current limiter further comprises sequencing logic coupled to an output of the first comparator, a latch coupled to an output of the first comparator at a set terminal of the latch and an output of the second comparator at a reset terminal of the latch, off time circuitry coupled to an output terminal of the latch, a second logic structure coupled to the latch and the off time circuitry, and a gate driver coupled to the second logic structure and an output of the sequencing logic.