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公开(公告)号:US20230384820A1
公开(公告)日:2023-11-30
申请号:US17824695
申请日:2022-05-25
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Atul Ramakant LELE , Dirk PREIKSZAT , Gregory NORTH , Robin Osa HOEL , Tarjei AABERGE
Abstract: Aspects of the disclosure provide for an apparatus. In an example, the apparatus includes a clock switching circuit coupled to oscillators and one or more circuit units. The clock switching circuit is configured to receive, from the oscillators, a set of frequency signals, provide an uplink primary clock signal and an enable signal to the one or more circuit units, the enable signal determined synchronously with the uplink primary clock signal, receive, from the one or more circuit units or a clock management circuit, a clock frequency request, provide the uplink primary clock signal based on a first signal of the set of frequency signals, and according to the clock frequency request, determining whether to continue to provide the uplink primary clock signal based on the first signal or on a second signal of the set of frequency signals.
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公开(公告)号:US20230138906A1
公开(公告)日:2023-05-04
申请号:US17566391
申请日:2021-12-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Robin Osa HOEL , Anand Kumar G , Praveen KUMAR N , Aniruddha PERIYAPATNA NAGENDRA , Ankitha M
Abstract: This disclosure relates to a system that includes a centralized trim controller and a non-volatile memory that includes a trim sector configured for hosting trim data for one or more peripherals. The trim controller is configured to receive, for each of the one or more peripherals, trim values of the one or more peripherals from the trim sector of the nonvolatile memory, and provide the trim values to the one or more peripherals. Some trim values are updateable by receiving a password at the trim controller. If the password is valid, a timeout counter is initiated, during which time the trim value is updateable.
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公开(公告)号:US20250037759A1
公开(公告)日:2025-01-30
申请号:US18360373
申请日:2023-07-27
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor: Robin Osa HOEL , Aniruddha PERIYAPATNA NAGENDRA , Prithvi Shankar YEYYADI ANANTHA , Shobhit SINGHAL
IPC: G11C11/413
Abstract: In an example, a system includes an SRAM configured to store a plurality of access control rules, where each rule is stored in a separate row. The SRAM is configured to store a plurality of context entries, where each context entry is stored in a separate row. The system includes a controller configured to receive a request for an access control rule for a memory location from a first context. The controller is configured to search one or more access control rules for the first context, where access control rules for the first context are stored in a binary tree format. The controller is configured to, responsive to finding the access control rule for the memory location, return the access control rule to the first context. The controller is configured to, responsive to not finding the access control rule, return a null notification to the first context.
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