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公开(公告)号:US20140346887A1
公开(公告)日:2014-11-27
申请号:US14050984
申请日:2013-10-10
发明人: BHARADVAJ BHAMIDIPATI , SWAMINATHAN SANKARAN , MARK W. MORGAN , GREGORY E. HOWARD , BRADLEY A. KRAMER
IPC分类号: H04B5/00
CPC分类号: H02J50/12 , H02J50/23 , H04B5/005 , H04B5/0087
摘要: A system on a package (SOP) can include a galvanic isolator. The galvanic isolator can include an input stage configured to transmit an input RF signal in response to receiving an input modulated signal. The galvanic isolator can also include a resonant coupler electrically isolated from the input stage by a dielectric. The resonant coupler can be configured to filter the input RF signal and transmit an output RF signal in response to the input RF signal. The galvanic isolator can further include an output stage electrically isolated from the resonant coupler by the dielectric. The output stage can be configured to provide an output modulated signal in response to receiving the output RF signal.
摘要翻译: 封装上的系统(SOP)可以包括电隔离器。 电流隔离器可以包括输入级,其被配置为响应于接收到输入调制信号而发送输入RF信号。 电流隔离器还可以包括通过电介质与输入级电隔离的谐振耦合器。 谐振耦合器可以被配置为对输入的RF信号进行滤波,并响应输入的RF信号传输输出的RF信号。 电流隔离器还可以包括通过电介质与谐振耦合器电隔离的输出级。 输出级可以被配置为响应于接收输出RF信号而提供输出调制信号。
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公开(公告)号:US20220407471A1
公开(公告)日:2022-12-22
申请号:US17353214
申请日:2021-06-21
发明人: SIRAJ AKHTAR , SWAMINATHAN SANKARAN
IPC分类号: H03F1/32
摘要: A circuit includes a main amplifier having a first input and a first output. A main bias circuit is coupled to the main amplifier, and the main bias circuit configured to operate the main amplifier in a first frequency band. A feedforward cancellation amplifier has a second input and a second output, in which the second input is coupled to the first input, and the second output is coupled to the first output. A filter is coupled between the first input and the second input. A feedforward bias circuit is coupled to the feedforward cancellation amplifier. The feedforward bias circuit is configured to operate the feedforward cancellation amplifier in a second frequency band within and narrower than the first frequency band.
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公开(公告)号:US20170331897A1
公开(公告)日:2017-11-16
申请号:US15380487
申请日:2016-12-15
CPC分类号: H04L67/12 , H04B5/0031
摘要: One example includes a system is comprised of an elongated transmission line and as module. The elongated transmission line includes an arrangement of transmission line couplers distributed along its length at spaced apart locations. The module has an outer surface and is comprised of a transmitter, and a transmitter coupler. The transmitter transmits a radio frequency signal. The transmitter coupler is on the outer surface of the module, electrically connects with the transmitter, and aligns to couple with a respective one of the transmission line couplers to provide a contactless communication link between the transmitter and the elongated transmission line.
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公开(公告)号:US20240333230A1
公开(公告)日:2024-10-03
申请号:US18192916
申请日:2023-03-30
发明人: TOLGA DINC , SWAMINATHAN SANKARAN
CPC分类号: H03F1/302 , H03F3/195 , H03F3/245 , H03F2200/105 , H03F2200/294 , H03F2200/451 , H03F2200/465 , H03F2200/84
摘要: A circuit includes a radio frequency (RF) detector having an RF detector input and an RF detector output. The RF detector is configured to provide a first signal at the RF detector output responsive to a second signal at the RF detector input. The circuit further includes a processing circuit having a processing terminal coupled to the RF detector output. The processing circuit is configured to provide a third signal at the terminal based on scaling the first signal by a factor that is proportional to temperature.
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公开(公告)号:US20200212895A1
公开(公告)日:2020-07-02
申请号:US16235291
申请日:2018-12-28
发明人: ERNST GEROG MUELLNER , TOBIAS FRITZ , BRADLEY KRAMER , SWAMINATHAN SANKARAN , BAHER HAROUN , RALF BREDERLOW
摘要: In described examples, a ring oscillator includes a series of N stages in a first ring. Each stage includes a respective output terminal coupled to a respective input terminal of a next one of the stages in the first ring. N is a positive odd-numbered integer of at least three. A series of N level shifters in a second ring are respectively connected to the N stages. Each level shifter receives a respective clock output from a respective output terminal of a stage to which it is connected and generates a respective boosted clock output in response thereto. The boosted clock output is coupled to control an impedance state of a next one of the level shifters in the second ring.
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