公开(公告)号：US20220109378A1

公开(公告)日：2022-04-07

申请号：US17491652

申请日：2021-10-01

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Himanshu CHAUDHARY ,  Salil CHELLAPPAN

IPC: H02M7/487 ,  H02M7/5395 ,  H02M1/32

Abstract: A control circuit for an inverter. The control circuit includes a first pulse width modulation (PWM) module configured to produce first and second complimentary PWM signals, and a second PWM module configured to produce a third and fourth complimentary PWM signals. PWM switching logic is coupled to the first and second PWM modules and is adapted to be coupled to a switch network. The switch network includes first, second, third, and fourth switches coupled in series between a first voltage terminal and a second voltage terminal. The PWM switching logic is configured to produce control signals for each of the first, second, third, and fourth switches in response to the first and second complimentary PWM signals and to the third and fourth complimentary PWM signals.

公开(公告)号：US20240275304A1

公开(公告)日：2024-08-15

申请号：US18648629

申请日：2024-04-29

Applicant: Texas Instruments Incorporated

Inventor： Himanshu CHAUDHARY ,  Salil CHELLAPPAN

IPC: H02M7/487 ,  H02M1/32 ,  H02M1/38 ,  H02M7/5395

CPC classification number: H02M7/487 ,  H02M1/32 ,  H02M1/38 ,  H02M7/5395

Abstract: A control circuit for an inverter. The control circuit includes a first pulse width modulation (PWM) module configured to produce first and second complementary PWM signals, and a second PWM module configured to produce a third and fourth complementary PWM signals. PWM switching logic is coupled to the first and second PWM modules and is adapted to be coupled to a switch network. The switch network includes first, second, third, and fourth switches coupled in series between a first voltage terminal and a second voltage terminal. The PWM switching logic is configured to produce control signals for each of the first, second, third, and fourth switches in response to the first and second complementary PWM signals and to the third and fourth complementary PWM signals.

公开(公告)号：US20180234088A1

公开(公告)日：2018-08-16

申请号：US15896952

申请日：2018-02-14

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Navaneeth Kumar NARAYANASAMY ,  Salil CHELLAPPAN ,  Apoorva AWASTHY

IPC: H03K17/0812 ,  H02H3/08 ,  H03K17/0814 ,  H02H7/20

CPC classification number: H03K17/08122 ,  H02H3/08 ,  H02H7/20 ,  H03K17/08128 ,  H03K17/08142

Abstract: In some examples, a gate driver includes a gate sense pin and a gate sense circuit configured to couple to a node of a transistor via the gate sense pin. The gate sense circuit includes an overcurrent detection circuit configured to detect a first fault condition based on the node before the transistor turns on in a soft switching mode. The gate sense circuit also includes a Miller plateau detection circuit configured to detect a second fault condition based on the node when the transistor is turning on in a hard switching mode.