公开(公告)号：US20230243887A1

公开(公告)日：2023-08-03

申请号：US18182848

申请日：2023-03-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Wilson Pradeep ,  Sriraj Chellappan ,  Shruti Gupta

IPC: G01R31/317 ,  H03K19/20 ,  G11C19/28 ,  G01R31/3177

CPC classification number: G01R31/31727 ,  H03K19/20 ,  G11C19/287 ,  G01R31/3177

Abstract: An integrated circuit for transition fault testing comprises a synchronizing circuit including a first set of shift registers coupled to receive a scan enable signal and to provide a synchronizing signal based on the scan enable signal; a clock leaker circuit coupled to the synchronizing circuit and including a second set of shift registers coupled to receive a first clock signal based on the synchronizing signal and to provide a second clock signal that includes a set of pulses; and a multiplexer (MUX) that includes a first input coupled to receive a shift clock, a second input coupled to the clock leaker circuit to receive the second clock signal, and an output configured to provide an output clock signal that includes a second set of pulses.

公开(公告)号：US12216160B2

公开(公告)日：2025-02-04

申请号：US18182848

申请日：2023-03-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Wilson Pradeep ,  Sriraj Chellappan ,  Shruti Gupta

IPC: G01R31/317 ,  G01R31/3177 ,  G11C19/28 ,  H03K19/20

Abstract: An integrated circuit for transition fault testing comprises a synchronizing circuit including a first set of shift registers coupled to receive a scan enable signal and to provide a synchronizing signal based on the scan enable signal; a clock leaker circuit coupled to the synchronizing circuit and including a second set of shift registers coupled to receive a first clock signal based on the synchronizing signal and to provide a second clock signal that includes a set of pulses; and a multiplexer (MUX) that includes a first input coupled to receive a shift clock, a second input coupled to the clock leaker circuit to receive the second clock signal, and an output configured to provide an output clock signal that includes a second set of pulses.

公开(公告)号：US11604221B1

公开(公告)日：2023-03-14

申请号：US17566190

申请日：2021-12-30

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Wilson Pradeep ,  Sriraj Chellappan ,  Shruti Gupta

IPC: G01R31/317 ,  G01R31/3177 ,  G11C19/28 ,  H03K19/20

Abstract: An integrated circuit for transition fault testing comprises a synchronizing circuit including a first set of shift registers coupled to receive a scan enable signal and to provide a synchronizing signal based on the scan enable signal; a clock leaker circuit coupled to the synchronizing circuit and including a second set of shift registers coupled to receive a first clock signal based on the synchronizing signal and to provide a second clock signal that includes a set of pulses; and a multiplexer (MUX) that includes a first input coupled to receive a shift clock, a second input coupled to the clock leaker circuit to receive the second clock signal, and an output configured to provide an output clock signal that includes a second set of pulses.