公开(公告)号：US11483181B1

公开(公告)日：2022-10-25

申请号：US17246867

申请日：2021-05-03

Applicant: Texas Instruments Incorporated

Inventor： Sreeram Nasum Subramanyam ,  Kashyap Jayendra Barot

IPC: H04L25/02

Abstract: A bidirectional capacitive isolator includes a capacitive isolation network, a first transceiver circuit, and a second transceiver circuit. The capacitive isolation network includes a first port and a second port. The first transceiver circuit is coupled to the first port of the capacitive isolation network, and includes circuitry configured to cancel signal transmitted by the first transceiver circuit from signal received by the first transceiver circuit. The second transceiver circuit is coupled to the second port of the capacitive isolation network, and includes circuitry configured to cancel signal transmitted by the second transceiver circuit from signal received by the second transceiver circuit.

公开(公告)号：US11967816B2

公开(公告)日：2024-04-23

申请号：US17244692

申请日：2021-04-29

Applicant: Texas Instruments Incorporated

Inventor： Ishaan Kubba ,  Sreeram Nasum Subramanyam ,  Shishir Goyal ,  Deep Banerjee

IPC: H02H3/00 ,  H03K5/01 ,  H03K5/24

CPC classification number: H02H3/003 ,  H03K5/01 ,  H03K5/24

Abstract: An input/output (I/O) interface includes a resistance-to-current (R/I) converter; an internal resistor; first, second, and third current sources; first and second diodes; and a comparator. The R/I converter is coupled to an I/O pin and generates an output current based on an external resistance at the I/O pin during an analog operating mode. The internal resistor is coupled to the I/O pin and to ground. The first current source is coupled to the R/I converter circuit. The first diode is coupled to the R/I converter and to the I/O pin. The second current source is coupled to the R/I converter and the first diode and to ground. The second diode is coupled to the I/O pin and to the third current source. The comparator has inputs coupled to the I/O pin and to a reference voltage, and outputs a control signal indicative of a digital operating mode.

公开(公告)号：US11502716B2

公开(公告)日：2022-11-15

申请号：US17123915

申请日：2020-12-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Viswanathan Venkatesh Kumar ,  Deep Banerjee ,  Shishir Goyal ,  Sreeram Nasum Subramanyam

IPC: H04B1/40 ,  H04B3/56 ,  H04B3/54 ,  H03K5/24

Abstract: An on-off keying (OOK) receiver circuit includes a band-pass filter and an envelope detector. The band-pass filter includes a high-pass filter, a low-pass filter, and a switch. The high-pass filter is configured to filter an OOK input signal. The low-pass filter is configured to filter an output signal of the high-pass filter. The switch is coupled to an output of the high-pass filter, and is configured to, with each cycle of the OOK input signal, dissipate energy stored in the band-pass filter. The envelope detector is configured to receive a filtered OOK input signal from the band-pass filter, and to generate an OOK output signal based on the filtered OOK input signal.

公开(公告)号：US20240113098A1

公开(公告)日：2024-04-04

申请号：US17955926

申请日：2022-09-29

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Sreeram Nasum Subramanyam ,  Shraddha Balasaheb Keripale ,  Chinna Veerappan Venkatachalam

IPC: H01L27/02 ,  H01L23/00 ,  H01L25/065

CPC classification number: H01L27/0255 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0655 ,  H01L29/866

Abstract: Examples of low capacitance bidirectional and unidirectional electrostatic discharge (ESD) protection devices for high voltage (e.g., 15 kV, 30 kV) applications are provided. Such devices include a circuit of a diode and a Zener diode coupled via their anodes to form an NPN structure and another, low capacitance diode coupled in series with the NPN structure. Such circuit may be configured on each of two dies, and the circuits coupled via wire bonds. Additional wire bonds may be used to respectively couple two pins of the device to the two circuits, or the pins may be coupled to the circuits via respective conductive die attaches. In a multichip module (MCM) topology, the NPN diode structure may be coupled to two low capacitance diodes on one die, and that circuit may be coupled to a third low capacitance diode disposed on another die. Some arrangements employ an insulator in conjunction with a single die. Some arrangements enable FlipChip fabrication technology.