公开(公告)号：US10461771B2

公开(公告)日：2019-10-29

申请号：US16054877

申请日：2018-08-03

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jerry Lee Doorenbos ,  Keith Eric Sanborn ,  Srikanth Vellore Avadhanam Ramamurthy ,  Mina Raymond Naguib Nashed ,  Dwight David Griffin

IPC: H03M3/00

Abstract: In some examples, a sigma-delta analog-to-digital converter (ADC), comprises a first set of switches configured to receive a first voltage signal; a second set of switches coupled to the first set of switches at a first node and a second node, the second set of switches configured to receive a second voltage signal; an integrator including a first input sampling capacitor coupled to the first node and a second input sampling capacitor coupled to the second node, wherein the integrator configured to generate a first output signal. The sigma-delta ADC further comprises a comparator coupled to the integrator and configured to generate a second output signal based on the first output signal; and a controller unit having a first counter, a second counter, and a processor, the controller unit coupled to the first and second sets of switches, the integrator, and the comparator.

公开(公告)号：US20240405760A1

公开(公告)日：2024-12-05

申请号：US18326418

申请日：2023-05-31

Applicant: Texas Instruments Incorporated

Inventor： Jitender Kapil ,  Srikanth Vellore Avadhanam Ramamurthy

IPC: H03K5/1252 ,  H03K5/24

Abstract: A differential transceiver including a driver circuit and a receiver circuit, and a serial communications network including the transceiver. The receiver circuit includes an input resistor attenuator, having first and second attenuator inputs coupled to the first and second terminals, respectively, a differential comparator having first and second comparator inputs, and an output buffer having an input coupled to the output of the comparator. The receiver circuit further includes a first switch coupling the first attenuator output to the first comparator input, a second switch coupling the second attenuator output to the second comparator input, and a fail-safe circuit including first and second current sources coupled to the first and second comparator inputs, respectively, and third and fourth switches coupled in series between the first and second current sources.

公开(公告)号：US10305507B1

公开(公告)日：2019-05-28

申请号：US15982670

申请日：2018-05-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jerry Lee Doorenbos ,  Keith Eric Sanborn ,  Mina Raymond Naguib Nashed ,  Srikanth Vellore Avadhanam Ramamurthy ,  Dwight David Griffin

IPC: H03M3/00

Abstract: A first-order sigma-delta analog-to-digital converter includes an input terminal, an integrator circuit, a comparator, and control circuitry. The input terminal is configured to receive a unipolar input signal to be digitized. The integrator circuit is coupled to the input terminal. The comparator is coupled to an output of the integrator circuit. The control circuitry is coupled to the integrator circuit and the comparator. The control circuitry is configured to equalize time that an output signal generated by the integrator circuit is greater than zero and time that the output signal generated by the integrator circuit is less than zero during digitization of the unipolar input signal.