MULTI OUTPUT GPIO RECEIVER
    1.
    发明申请

    公开(公告)号:US20220209754A1

    公开(公告)日:2022-06-30

    申请号:US17179707

    申请日:2021-02-19

    Abstract: An assembly includes a signal input, a signal output, a pull-up stack coupled to the signal input and to the signal output, a pull-down stack coupled to the signal input and to the signal output, and a hysteresis assembly coupled to the pull-up stack and to the pull-down stack. The pull-up stack comprises a pair of metal oxide semiconductor field-effect transistors (transistors) coupled in series, each transistor of the pair of transistors comprising a gate coupled to the signal input. The pull-down stack comprises a plurality of transistors coupled in series, the plurality of transistors comprising: a first transistor comprising a gate coupled to the signal input, a second transistor comprising a gate coupled to the signal input, and a third transistor. The hysteresis assembly comprises a pair of transistors, each transistor of the pair of transistors of the hysteresis assembly having a gate coupled to the signal output.

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