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公开(公告)号：US11831358B2
公开(公告)日：2023-11-28
申请号：US18053403
申请日：2022-11-08
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kumaran Vijayasankar , Ramanuja Vedantham , Tarkesh Pande
IPC: H04B3/54 , H04L12/413
CPC classification number: H04B3/544 , H04L12/413 , H04B2203/5408 , H04B2203/5433 , H04B2203/5445
Abstract: Systems and methods for setting a carrier-sensing mechanism in a PLC node are disclosed. In a PLC standard, coexistence is achieved by having the nodes detect a common preamble and backing off by a Coexistence InterFrame Space (cEIFS) time period to help the node to avoid interfering with the other technologies. In one embodiment, a PHY primitive is sent from the PHY to the MAC know that there has been a preamble detection. A two-level indication may be used—one indication after receiving the preamble and other indication after decoding the entire frame. The MAC sets the carrier-sensing mechanism based on the preamble detection.
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公开(公告)号：US11546450B2
公开(公告)日：2023-01-03
申请号：US17355231
申请日：2021-06-23
Applicant: Texas Instruments Incorporated
Inventor： Anand G. Dabak , Badri N Varadarajan , Il Han Kim , Tarkesh Pande
Abstract: Methods for building, transmitting, and receiving frame structures in power line communications (PLC) are described. Various techniques described herein provide a preamble design using one or more symbols. One or more preamble symbols may be interspersed within a header portion of a PLC frame to facilitate estimation of a frame boundary and/or sampling frequency offset, for example, in the presence of impulsive noise.
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公开(公告)号：US20220158689A1
公开(公告)日：2022-05-19
申请号：US17665537
申请日：2022-02-06
Applicant: Texas Instruments Incorporated
Inventor： Il Han Kim , ANAND G. Dabak , Tarkesh Pande
IPC: H04B3/54
Abstract: In a powerline communications (PLC) network having a first node and at least a second node on a PLC channel utilizing a band including a plurality of tones, based on at least one channel quality indicator (CQI), the first node allocates for a tone map response payload only a single (1) power control bit for each of a plurality of subbands having two or more tones. The power control bit indicates a first power state or a second power state. The first node transmits a frame including the tone map response payload to the second node. The second node transmits a frame having boosted signal power for the tones in the subbands which have the first power state compared to a lower signal power for the tones in the subbands which have the second power state.
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公开(公告)号：US11129538B2
公开(公告)日：2021-09-28
申请号：US16442845
申请日：2019-06-17
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Tarkesh Pande , David Patrick Magee , Rajan Narasimha
Abstract: Disclosed examples include heart rate monitor systems and methods to estimate a patient heart rate or rate of another pulsed signal, in which rate hypotheses or states, are identified for a current time window according to digital sample values of the pulsed signal for a current sample time window, and a rate change value is computed for potential rate transitions between states of the current and previous time windows. Transition pair branch metric values are computed as a function of the rate change value and a frequency domain amplitude of the corresponding rate hypothesis for the current time window, and the pulsed signal rate estimate is determined according to a maximum path metric computed according to the branch metric value and a corresponding path metric value for the previous time window.
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公开(公告)号：US10812140B2
公开(公告)日：2020-10-20
申请号：US16355180
申请日：2019-03-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Tarkesh Pande , Anand G. Dabak , Il-Han Kim
IPC: H04B3/54
Abstract: Embodiments of the invention provide multiple cyclic prefix lengths for either both the data-payload and frame control header or only the data payload. Frame control header (FCH) and data symbols have an associated cyclic prefix. A table is transmitted in the FCH symbols, which includes a cyclic prefix field to identify the cyclic prefix length used in the data payload. A receiver may know the cyclic prefix length used in the FCH symbols in one embodiment. In other embodiments, the receiver does not know the FCH cyclic prefix length and, therefore, attempts to decode the FCH symbols using different possible cyclic prefix lengths until the FCH symbols are successfully decoded.
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Patent Agency Ranking
公开(公告)号：US20200322002A1
公开(公告)日：2020-10-08
申请号：US16852700
申请日：2020-04-20
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Kumaran Vijayasankar , Ramanuja Vedantham , Tarkesh Pande
IPC: H04B3/54 , H04L12/413
Abstract: Systems and methods for setting a carrier-sensing mechanism in a PLC node are disclosed. In a PLC standard, coexistence is achieved by having the nodes detect a common preamble and backing off by a Coexistence InterFrame Space (cEIFS) time period to help the node to avoid interfering with the other technologies. In one embodiment, a PHY primitive is sent from the PHY to the MAC know that there has been a preamble detection. A two-level indication may be used—one indication after receiving the preamble and other indication after decoding the entire frame. The MAC sets the carrier-sensing mechanism based on the preamble detection.
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7.发明申请公开(公告)号：US20200259687A1
公开(公告)日：2020-08-13
申请号：US16515248
申请日：2019-07-18
Applicant: Texas Instruments Incorporated
Inventor： Nikolaus Klemmer , Amneh Mohammed Akour , Abhijit Anant Patki , Timothy Patrick Pauletti , Tarkesh Pande
Abstract: An integrated circuit includes a bit slicing circuit with a processing circuit. The processing circuit receives discrete frequency power estimates based on an S-FSK waveform received by an S-FSK receiver associated with the bit slicing circuit. The discrete frequency power estimates are representative of digital logic levels in a series of data frames modulated using S-FSK to form the S-FSK waveform. Each data frame including at least one word. Each word includes bit periods. The processing circuit receives SNR parameters that represent a dynamic SNR for the respective discrete frequency power estimates in relation to the series of data frames. The processing circuit selects a bit slicing technique from a set of available bit slicing techniques to generate data bit values for bit periods of the discrete frequency power estimates based on the SNR parameters. A method for performing bit slicing in an S-FSK receiver is also disclosed.
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公开(公告)号：US10116575B2
公开(公告)日：2018-10-30
申请号：US14540111
申请日：2014-11-13
Applicant: Texas Instruments Incorporated
Inventor： Kumaran Vijayasankar , Ramanuja Vedantham , Anand G. Dabak , Tarkesh Pande , Il Han Kim
IPC: H04L12/825 , H04L12/801 , H04B3/54 , H04L12/835 , H04L12/823
Abstract: A method of powerline communications in a powerline communications (PLC) network including a first PLC device and at least a second PLC device. The first PLC device transmits a data frame to the second node over a PLC channel. The second PLC device has a data buffer for storing received information. The second PLC device runs a flow control algorithm which determines a current congestion condition or a projected congestion condition of the data buffer based on at least one congestion parameter. The current congestion condition and projected congestion condition include nearly congested and fully congested. When the current or projected congestion condition is either nearly congested or fully congested, the second PLC device transmits a BUSY including frame over the PLC channel to at least the first PLC device. The first PLC device defers transmitting of any frames to the second PLC device for a congestion clearing wait time.
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公开(公告)号：US10116407B2
公开(公告)日：2018-10-30
申请号：US15690427
申请日：2017-08-30
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Tarkesh Pande , Anuj Batra , Il Han Kim
Abstract: An orthogonal frequency division multiplexing (OFDM) receiver includes detection logic, offset generation logic, tone erasure logic, and correction generation logic. The detection logic is configured to detect a signal containing a block of samples that includes a narrowband interferer from a communication channel. The offset generation logic is configured to align a frequency of the narrowband interferer to a center of a subcarrier frequency of the communication channel to produce an offset signal thereby introducing inter-carrier interference (ICI). The tone erasure logic is configured to remove the subcarrier frequency from the offset signal to produce an interferer erased offset signal. The correction generation logic is configured to remove the ICI to produce an interferer erased signal.
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公开(公告)号：US20180268815A1
公开(公告)日：2018-09-20
申请号：US15706128
申请日：2017-09-15
Applicant: TEXAS INSTRUMENTS INCORPORATED
Inventor： Tarkesh Pande , Lorin Paul Netsch , David Patrick Magee
CPC classification number: G10L15/22 , G10L15/01 , G10L15/02 , G10L15/08 , G10L2015/025 , G10L2015/088 , G10L2015/221
Abstract: Systems and methods are provided for an automated speech recognition system. A microphone records a keyword spoken by a user, and a front end divides the recorded keyword into a plurality of subunits, each containing a segment of recorded audio, and extracts a set of features from each of the plurality of subunits. A decoder assigns one of a plurality of content classes to each of the plurality of subunits according to at least the extracted set of features for each subunit. A quality evaluation component calculates a score representing a quality of the keyword from the content classes assigned to the plurality of subunits.
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