PACKAGES WITH LOW-PROFILE POLYIMIDE LAYERS

    公开(公告)号:US20250096156A1

    公开(公告)日:2025-03-20

    申请号:US18470321

    申请日:2023-09-19

    Abstract: In examples, a package comprises a semiconductor die having a device side comprising circuitry formed therein. The package comprises a planarized passivation layer abutting the device side and a horizontal metal member coupled to the device side by way of vias extending through the passivation layer. The horizontal metal member has a thickness ranging between 4 microns and 25 microns. The package also comprises a metal post coupled to and vertically aligned with the horizontal metal member without a sputtered seed layer between the metal post and the horizontal metal member. The metal post has a vertical thickness ranging between 10 microns and 80 microns. The package also comprises a polyimide (PI) layer contacting the metal post, the horizontal metal member, and the passivation layer. The PI layer is not positioned between the metal post and the horizontal metal member. A thickness of a thickest portion of the PI layer ranges between 3 microns and 80 microns.

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