公开(公告)号：US20130250928A1

公开(公告)日：2013-09-26

申请号：US13849015

申请日：2013-03-22

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Soon-Hyeok CHOI ,  Ariton E. XHAFA ,  Yanjun SUN

IPC: H04W72/04

CPC classification number: H04W72/0446

Abstract: Various techniques are disclosed for assigning timeslots in a multihop wireless network. One such method includes, for each node for uplink timeslot assignments, assigning a higher hop count node to a timeslot that is to occur before all time slots assigned to lower hop count nodes. The method further includes, for each node for downlink timeslot assignments, assigning a lower hop count node to a timeslot that is to occur before all time slots assigned to higher hop count nodes.

Abstract translation: 公开了用于在多跳无线网络中分配时隙的各种技术。 一种这样的方法包括对于每个节点进行上行链路时隙分配，将更高的跳数节点分配给将在分配给下一跳计数节点的所有时隙之前发生的时隙。 该方法还包括对于每个用于下行链路时隙分配的节点，将下一跳计数节点分配给将在分配给更高跳数节点的所有时隙之前发生的时隙。

公开(公告)号：US20130217399A1

公开(公告)日：2013-08-22

申请号：US13766335

申请日：2013-02-13

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Ariton E. XHAFA ,  Soon-Hyeok CHOI ,  Srinath HOSUR ,  Yanjun SUN

IPC: H04W72/04

CPC classification number: H04W72/04 ,  H04W24/10 ,  H04W48/12 ,  H04W84/18

Abstract: A system comprising a controller, a scanner, and a transceiver. The controller is configured to identify a number of channels in which a beacon signal may be wirelessly transmitted. The number of channels is less than a total number of channels available for receiving transmissions. The scanner is configured to scan each of the number of channels for a first beacon signal. The transceiver is configured to receive the first beacon signal from one of the number of channels.

Abstract translation: 一种包括控制器，扫描器和收发器的系统。 控制器被配置为识别可以无线发送信标信号的信道的数量。 信道数小于可用于接收传输的信道的总数。 扫描器被配置为扫描第一信标信号的每个信道数目。 收发器被配置为从多个信道中的一个接收第一信标信号。

公开(公告)号：US20130179715A1

公开(公告)日：2013-07-11

申请号：US13738124

申请日：2013-01-10

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Yanjun SUN ,  Soon-Hyeok CHOI ,  Sejoong LEE ,  Ariton E. XHAFA

IPC: G06F1/32

CPC classification number: G06F1/3234

Abstract: A system includes a volatile memory and state information management logic. The volatile memory includes a plurality of volatile storage locations. The state information management logic includes memory write tracking circuitry coupled to the volatile memory. The memory write tracking circuitry is configured to identify locations of the memory written subsequent to restoration of state information to the volatile memory on exit of a low-power mode of operation, and to store indicia of the identified locations.

Abstract translation: 系统包括易失性存储器和状态信息管理逻辑。 易失性存储器包括多个易失性存储位置。 状态信息管理逻辑包括耦合到易失性存储器的存储器写跟踪电路。 存储器写跟踪电路被配置为在退出低功率操作模式时识别在将状态信息恢复到易失性存储器之后写入的存储器的位置，并且存储所识别的位置的标记。