EDGE RATE CONTROL GATE DRIVE CIRCUIT AND SYSTEM FOR LOW SIDE DEVICES WITH CAPACITOR
    1.
    发明申请
    EDGE RATE CONTROL GATE DRIVE CIRCUIT AND SYSTEM FOR LOW SIDE DEVICES WITH CAPACITOR 有权
    边缘速度控制门驱动电路和系统用于具有电容器的低端设备

    公开(公告)号:US20140125389A1

    公开(公告)日:2014-05-08

    申请号:US13754543

    申请日:2013-01-30

    Inventor: Adam L. Shook

    CPC classification number: H03K19/00361 G05F3/16 H03K5/12 H03K19/00384

    Abstract: An apparatus, comprising: a PMOS current mirror have a first PFET and a second PFET coupled at their respective gates; a first current source coupled to drain of the first PFET; a second current source configured to have a current that is greater than the first current source, coupled to the drain of the second PFET; a capacitor coupled to the gates of the PFET current mirror; a third PFET gate-coupled to the current mirror; a driver NFET having a gate coupled to the drain of the third PFET, wherein a drain of the driver NFET is coupled to the capacitor.

    Abstract translation: 一种装置,包括:PMOS电流镜,具有在其各自的栅极耦合的第一PFET和第二PFET; 耦合到所述第一PFET的漏极的第一电流源; 被配置为具有大于所述第一电流源的电流的第二电流源,耦合到所述第二PFET的漏极; 耦合到PFET电流镜的栅极的电容器; 栅极耦合到电流镜的第三PFET; 具有耦合到第三PFET的漏极的栅极的驱动器NFET,其中驱动器NFET的漏极耦合到电容器。

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