Method of contentions mitigation for an operational application, associated computer program product and method for determining a stress application

    公开(公告)号:US11803427B2

    公开(公告)日:2023-10-31

    申请号:US17318777

    申请日:2021-05-12

    Applicant: THALES

    CPC classification number: G06F9/526

    Abstract: The present invention relates to a method of contentions mitigation for an operational application implemented by an embedded platform comprising a plurality of cores and a plurality of shared resources.
    This method comprises the steps of executing the operational application by one of the cores of the embedded platform, executing a stressor application on at least some other cores of the embedded platform in parallel with the operational application, the stressor application being composed of a set of contention tasks generating a maximum contention on interference channels, and determining contentions generated by the stressor application on the operational application.

    Method and electronic device for verifying a partitioning configuration, associated computer program

    公开(公告)号:US10860379B2

    公开(公告)日:2020-12-08

    申请号:US15955309

    申请日:2018-04-17

    Applicant: THALES

    Abstract: The present invention relates to a method for verifying a partitioning configuration, between consuming elements (13), of resources (14) of an electronic module (12), each resource (14) having a capacity and being divisible into segments, the method comprising: verifying the compliance with a set of partitioning rules, according to which: the sum of the unitary capacities of the resource segments allocated for each resource (14) is less than the capacity of said resource (14), only the resource segments previously defined can be allocated to distinct consuming elements (13), the use of resource segments by a consuming element (13) is limited to the resource segments allocated to said consuming element (13), the partitioning configuration being considered valid when the set of partitioning rules is respected, exploiting the module (12) with the partitioning configuration.

    METHOD AND ELECTRONIC DEVICE FOR INSTALLING AVIONICS SOFTWARE APPLICATIONS ON A PLATFORM COMPRISING A MULTI-CORE PROCESSOR, RELATED COMPUTER PROGRAM AND ELECTRONIC SYSTEM

    公开(公告)号:US20200034130A1

    公开(公告)日:2020-01-30

    申请号:US16517179

    申请日:2019-07-19

    Applicant: Thales

    Abstract: This method for installing avionics software applications on a platform with a multi-core processor and intended to be on board an aircraft is implemented by an electronic installation device. Each avionics software application includes one or several software processing operations to be executed over a predefined time period including one or several successive time clusters.It comprises determining an installation plan for the software processing operations according to a first installation rule and/or a second installation rule, the installation plan defining, for each software processing operation, at least one core and at least one time cluster that are associated with said software processing operation, the first rule consisting of predetermining a list of authorized combinations of criticality levels for applications intended to be executed during a same time cluster, and the second rule consisting of prohibiting installation of critical software application(s) on one or several cores of the plurality of cores.

    Method and electronic device for installing avionics software applications on a platform comprising a multi-core processor, related computer program and electronic system

    公开(公告)号:US10983777B2

    公开(公告)日:2021-04-20

    申请号:US16517179

    申请日:2019-07-19

    Applicant: THALES

    Abstract: This method for installing avionics software applications on a platform with a multi-core processor and intended to be on board an aircraft is implemented by an electronic installation device. Each avionics software application includes one or several software processing operations to be executed over a predefined time period including one or several successive time clusters.
    It comprises determining an installation plan for the software processing operations according to a first installation rule and/or a second installation rule, the installation plan defining, for each software processing operation, at least one core and at least one time cluster that are associated with said software processing operation, the first rule consisting of predetermining a list of authorized combinations of criticality levels for applications intended to be executed during a same time cluster, and the second rule consisting of prohibiting installation of critical software application(s) on one or several cores of the plurality of cores.

    Method and device for the validation of networks
    10.
    发明授权
    Method and device for the validation of networks 有权
    用于验证网络的方法和设备

    公开(公告)号:US09071515B2

    公开(公告)日:2015-06-30

    申请号:US13722287

    申请日:2012-12-20

    Applicant: THALES

    Inventor: Marc Fumey

    CPC classification number: H04L43/08 H04L47/20 H04L47/283

    Abstract: A method is provided for the validation of a network by a checking module, the network comprising a plurality of routers, each of the routers comprising a plurality of output ports, each of the output ports of the routers being associated with a bandwidth budget, a priority latency budget and a plurality of network budget grains. The method comprises, for each of the ports of each of the routers, steps of: calculation of a latency consumed on the output port of the router on the basis of the network budget grains and the bandwidth budget; checking of the compatibility of the latency consumed on the output port with the priority latency budget grains of the output port of the router; and, transmission by the checking module of a signal indicating the result of the check.

    Abstract translation: 提供了一种用于由检查模块验证网络的方法,所述网络包括多个路由器,所述路由器中的每一个包括多个输出端口,所述路由器的每个输出端口与带宽预算相关联, 优先级延迟预算和多个网络预算谷物。 该方法包括对于每个路由器的每个端口的步骤:基于网络预算谷物和带宽预算来计算在路由器的输出端口上消耗的等待时间; 检查输出端口上消耗的延迟与路由器的输出端口的优先级延迟预算值的兼容性; 并且由检查模块发送指示检查结果的信号。

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