公开(公告)号：US11206029B2

公开(公告)日：2021-12-21

申请号：US16591679

申请日：2019-10-03

申请人： THINE ELECTRONICS, INC.

发明人： Yusuke Fujita ,  Yuji Gendai

IPC分类号： H03L7/099 ,  H03L7/18 ,  H03L7/089

摘要： A PLL circuit includes a phase comparator, a charge pump, a loop filter, a voltage-controlled oscillator, a frequency divider, a frequency difference determination unit, and an FV characteristics adjustment unit. The frequency difference determination unit determines whether or not a frequency difference between a feedback oscillation signal and an input signal is equal to or smaller than a threshold value. The FV characteristics adjustment unit selects a frequency band in the voltage-controlled oscillator and adjusts FV characteristics.

公开(公告)号：US10826451B2

公开(公告)日：2020-11-03

申请号：US16152505

申请日：2018-10-05

申请人： THINE ELECTRONICS, INC.

发明人： Yuji Gendai

IPC分类号： H03F3/45 ,  H03G1/00 ,  H03G3/00

摘要： A combined resistance circuit 2A includes a first circuitry 20A provided between a first end 2a and a second end 2b. This first circuitry 20A includes a resistor R1 provided between a node N11 and a node N12, a resistor R2 provided between the node N12 and a node N13, a resistor R3 provided between the node N13 and a node N14, a resistor R4 provided between the node N14 and the node N11, a resistor R5 provided between the node N11 and the node N13, a switch SW0 provided in series to the resistor R4 between the node N14 and the node N11, and a switch SW1 provided in series to the resistor R2 between the node N12 and the node N13. The node N12 is connected to the first end and the node N14 is connected to the second end.

公开(公告)号：US12055966B2

公开(公告)日：2024-08-06

申请号：US17706835

申请日：2022-03-29

申请人： THINE ELECTRONICS, INC.

发明人： Yuji Gendai ,  Shunichi Kubo

IPC分类号： G05F3/26 ,  G05F3/24

CPC分类号： G05F3/262 ,  G05F3/242

摘要： A reference current source includes a reference current path, a first output current path and a second output current path. The reference current path includes a diode-connected first transistor, a diode-connected second transistor, and a first resistor that are connected in series between a first fixed potential and a second fixed potential. The first output current path includes a third transistor having a gate connected to a gate of the second transistor, forming a current mirror together with the second transistor, and a second resistor interposed between the third transistor and the first fixed potential. The second output current path includes a voltage-current conversion circuit to which a potential of a third node between the third transistor and the second resistor in the first output current path is applied and through which a reference current flows.