公开(公告)号：US5252195A

公开(公告)日：1993-10-12

申请号：US980313

申请日：1992-10-28

申请人： Tadashi Kobayashi ,  Hiroyuki Uchida ,  Hidetoshi Shimoda ,  Toshio Takahashi

发明人： Tadashi Kobayashi ,  Hiroyuki Uchida ,  Hidetoshi Shimoda ,  Toshio Takahashi

IPC分类号： H05K3/42 ,  C25D5/02

CPC分类号： H05K3/428 ,  H05K2203/0542 ,  H05K2203/1394

摘要： A process for the production of a printed wiring board, which comprises preparing a copper-clad laminate having a through-hole formed by drilling; providing a first resist pattern on the surface of the copper-clad laminate so as to cover a portion to be formed as a conductor pattern; etching the copper-clad laminate; removing the first resist pattern; subjecting the whole laminate to an electroless copper plating; laminating a dry film resist on the copper-clad laminate; exposing and developing the dry film resist to form a second resist pattern in such a manner that the through-hole and a portion to be plated are exposed; subjecting the exposed portions to an electrolytic copper plating; removing the second resist pattern; and removing the exposed electroless copper plating through etching.

摘要翻译： 一种制造印刷线路板的方法，包括制备具有通过钻孔形成的通孔的覆铜层压板; 在覆铜层压板的表面上提供第一抗蚀剂图案，以覆盖要形成的导体图案的部分; 蚀刻覆铜层压板; 去除第一抗蚀剂图案; 对整个层压板进行化学镀铜; 在覆铜层压板上层压干膜抗蚀剂; 曝光和显影干膜抗蚀剂以形成第二抗蚀剂图案，使得通孔和待镀部分暴露; 对暴露部分进行电解镀铜; 去除第二抗蚀剂图案; 并通过蚀刻去除暴露的化学镀铜。