公开(公告)号：US20080315285A1

公开(公告)日：2008-12-25

申请号：US12071452

申请日：2008-02-21

申请人： Tae-hee Lee ,  Jae-woong Hyun ,  Ju-hee Park ,  In-kyeong Yoo ,  Yoon-dong Park ,  Won-joo Kim ,  Jung-hoon Lee

发明人： Tae-hee Lee ,  Jae-woong Hyun ,  Ju-hee Park ,  In-kyeong Yoo ,  Yoon-dong Park ,  Won-joo Kim ,  Jung-hoon Lee

IPC分类号： H01L29/788 ,  H01L21/336

CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42336

摘要： Non-volatile memory devices and methods of fabricating the same are provided. The non-volatile memory devices may include a semiconductor substrate having a pair of sidewall channel regions extending from the semiconductor substrate and opposite to each other, and a floating gate electrode between the pair of sidewall channel regions and protruding from the semiconductor substrate. A control gate electrode may be formed on the semiconductor substrate and a portion of the floating gate electrode.

摘要翻译： 提供非易失性存储器件及其制造方法。 非易失性存储器件可以包括具有从半导体衬底延伸并且彼此相对的一对侧壁沟道区的半导体衬底，以及在该对侧壁沟道区之间并从半导体衬底突出的浮置栅电极。 控制栅电极可以形成在半导体衬底和浮栅电极的一部分上。

公开(公告)号：US07791942B2

公开(公告)日：2010-09-07

申请号：US12073314

申请日：2008-03-04

申请人： Won-joo Kim ,  Tae-hee Lee ,  Jae-woong Hyun ,  Yoon-dong Park

发明人： Won-joo Kim ,  Tae-hee Lee ,  Jae-woong Hyun ,  Yoon-dong Park

IPC分类号： G11C16/04

CPC分类号： G11C16/34

摘要： Methods of operating nonvolatile memory devices are provided. In a method of operating a nonvolatile memory device including a plurality of memory cells, recorded data is stabilized by inducing a boosting voltage on a channel of a memory cell in which the recorded data is recorded. The memory cell is selected from a plurality of memory cells and the boosting voltage on the channel of the selected memory cell is induced by a channel voltage of at least one memory cell connected to the selected memory cell.

摘要翻译： 提供了非易失性存储器件的操作方法。 在操作包括多个存储单元的非易失性存储器件的方法中，通过在其中记录有记录数据的存储单元的通道上感应升压电压来稳定记录数据。 从多个存储单元中选择存储单元，并且所选存储单元的通道上的升压电压由连接到所选存储单元的至少一个存储单元的通道电压引起。

公开(公告)号：US07675779B2

公开(公告)日：2010-03-09

申请号：US12010490

申请日：2008-01-25

申请人： Won-joo Kim ,  Yoon-dong Park ,  Seung-hoon Lee ,  Suk-pil Kim ,  Jae-woong Hyun ,  Jung-hun Sung ,  Tae-hee Lee

发明人： Won-joo Kim ,  Yoon-dong Park ,  Seung-hoon Lee ,  Suk-pil Kim ,  Jae-woong Hyun ,  Jung-hun Sung ,  Tae-hee Lee

IPC分类号： G11C16/06

CPC分类号： H01L27/11521 ,  G11C16/0483 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/11568

摘要： A non-volatile memory device includes memory transistors disposed on a semiconductor substrate in a NAND string. A string select transistor is disposed at a first end of the NAND string, and a ground select transistor is disposed at a second end of the NAN string. Bit lines are electrically connected to the semiconductor substrate outside of the string select transistor and a gate electrode of the ground select transistor.

摘要翻译： 非易失性存储器件包括设置在NAND串中的半导体衬底上的存储晶体管。 串选择晶体管设置在NAND串的第一端，并且接地选择晶体管设置在NAN串的第二端。 位线电连接到串选择晶体管外部的半导体衬底和接地选择晶体管的栅电极。

公开(公告)号：US20080259688A1

公开(公告)日：2008-10-23

申请号：US12010490

申请日：2008-01-25

申请人： Won-joo Kim ,  Yoon-dong Park ,  Seung-hoon Lee ,  Suk-pil Kim ,  Jae-woong Hyun ,  Jung-hun Sung ,  Tae-hee Lee

发明人： Won-joo Kim ,  Yoon-dong Park ,  Seung-hoon Lee ,  Suk-pil Kim ,  Jae-woong Hyun ,  Jung-hun Sung ,  Tae-hee Lee

IPC分类号： G11C11/34

CPC分类号： H01L27/11521 ,  G11C16/0483 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/11568

摘要： A non-volatile memory device includes memory transistors disposed on a semiconductor substrate in a NAND string. A string select transistor is disposed at a first end of the NAND string, and a ground select transistor is disposed at a second end of the NAN string. Bit lines are electrically connected to the semiconductor substrate outside of the string select transistor and a gate electrode of the ground select transistor.

摘要翻译： 非易失性存储器件包括设置在NAND串中的半导体衬底上的存储晶体管。 串选择晶体管设置在NAND串的第一端，并且接地选择晶体管设置在NAN串的第二端。 位线电连接到串选择晶体管外部的半导体衬底和接地选择晶体管的栅电极。

公开(公告)号：US08000148B2

公开(公告)日：2011-08-16

申请号：US12805501

申请日：2010-08-03

申请人： Won-joo Kim ,  Tae-hee Lee ,  Jae-woong Hyun ,  Yoon-dong Park

发明人： Won-joo Kim ,  Tae-hee Lee ,  Jae-woong Hyun ,  Yoon-dong Park

IPC分类号： G11C16/04

CPC分类号： G11C16/34

摘要： Methods of operating nonvolatile memory devices are provided. In a method of operating a nonvolatile memory device including a plurality of memory cells, recorded data is stabilized by inducing a boosting voltage on a channel of a memory cell in which the recorded data is recorded. The memory cell is selected from a plurality of memory cells and the boosting voltage on the channel of the selected memory cell is induced by a channel voltage of at least one memory cell connected to the selected memory cell.

摘要翻译： 提供了非易失性存储器件的操作方法。 在操作包括多个存储单元的非易失性存储器件的方法中，通过在其中记录有记录数据的存储单元的通道上感应升压电压来稳定记录数据。 从多个存储单元中选择存储单元，并且所选存储单元的通道上的升压电压由连接到所选存储单元的至少一个存储单元的通道电压引起。

公开(公告)号：US20090016107A1

公开(公告)日：2009-01-15

申请号：US12073314

申请日：2008-03-04

申请人： Won-joo Kim ,  Tae-hee Lee ,  Jae-woong Hyun ,  Yoon-dong Park

发明人： Won-joo Kim ,  Tae-hee Lee ,  Jae-woong Hyun ,  Yoon-dong Park

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C16/34

摘要： Methods of operating nonvolatile memory devices are provided. In a method of operating a nonvolatile memory device including a plurality of memory cells, recorded data is stabilized by inducing a boosting voltage on a channel of a memory cell in which the recorded data is recorded. The memory cell is selected from a plurality of memory cells and the boosting voltage on the channel of the selected memory cell is induced by a channel voltage of at least one memory cell connected to the selected memory cell.

摘要翻译： 提供了非易失性存储器件的操作方法。 在操作包括多个存储单元的非易失性存储器件的方法中，通过在其中记录有记录数据的存储单元的通道上感应升压电压来稳定记录数据。 从多个存储单元中选择存储单元，并且所选存储单元的通道上的升压电压由连接到所选存储单元的至少一个存储单元的通道电压引起。

公开(公告)号：US20070019479A1

公开(公告)日：2007-01-25

申请号：US11393750

申请日：2006-03-31

申请人： Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  Eun-Hong Lee ,  Jae-woong Hyun ,  Jung-hoon Lee ,  Sung-jae Byun

发明人： Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  Eun-Hong Lee ,  Jae-woong Hyun ,  Jung-hoon Lee ,  Sung-jae Byun

IPC分类号： G11C7/10

CPC分类号： H01L29/66795 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/10876 ,  H01L27/10879 ,  H01L27/11507 ,  H01L27/2436 ,  H01L29/785

摘要： A semiconductor device may include at least one pair of fins on a semiconductor substrate. A channel region may be formed in each fin. The semiconductor device may further include a gate electrode corresponding to each pair of channel regions, a source contact plug electrically connected to each of at least one source formed on a respective fin concurrently, and a drain contact plug electrically connected to each of at least one drain formed on a respective fin concurrently.

摘要翻译： 半导体器件可以包括半导体衬底上的至少一对散热片。 可以在每个鳍中形成沟道区。 半导体器件还可以包括对应于每对沟道区的栅电极，同时电连接到形成在相应散热片上的至少一个源中的每一个的源极接触插塞以及电连接到至少一个 漏斗同时形成在相应的翅片上。

公开(公告)号：US20080151631A1

公开(公告)日：2008-06-26

申请号：US11980358

申请日：2007-10-31

申请人： Jae-woong Hyun ,  Kyu-charn Park ,  Yoon-dong Park ,  Won-joo Kim ,  Young-gu Jin ,  Suk-pil Kim ,  Kyoung-lae Cho ,  Jung-hoon Lee ,  Seung-hwan Song

发明人： Jae-woong Hyun ,  Kyu-charn Park ,  Yoon-dong Park ,  Won-joo Kim ,  Young-gu Jin ,  Suk-pil Kim ,  Kyoung-lae Cho ,  Jung-hoon Lee ,  Seung-hwan Song

IPC分类号： G11C16/06 ,  H01L29/788

CPC分类号： H01L27/115 ,  B82Y10/00 ,  G11C16/0483 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11568 ,  H01L27/1203

摘要： A highly integrated non-volatile memory device and a method of operating the non-volatile memory device are provided. The non-volatile memory device includes a semiconductor layer. A plurality of upper control gate electrodes are arranged above the semiconductor layer. A plurality of lower control gate electrodes are arranged below the semiconductor layer, and the plurality of upper control gate electrodes and the plurality of lower control gate electrodes are disposed alternately. A plurality of upper charge storage layers are interposed between the semiconductor layer and the upper control gate electrodes. A plurality of lower charge storage layers are interposed between the semiconductor layer and the lower control gate electrodes.

摘要翻译： 提供高度集成的非易失性存储器件和操作非易失性存储器件的方法。 非易失性存储器件包括半导体层。 多个上控制栅电极设置在半导体层的上方。 多个下部控制栅电极配置在半导体层的下方，多个上部控制栅极电极和多个下部控制栅极电极交替配置。 多个上电荷存储层插入在半导体层和上控制栅电极之间。 多个下电荷存储层插入在半导体层和下控制栅电极之间。

公开(公告)号：US07679960B2

公开(公告)日：2010-03-16

申请号：US11980358

申请日：2007-10-31

申请人： Jae-woong Hyun ,  Kyu-charn Park ,  Yoon-dong Park ,  Won-joo Kim ,  Young-gu Jin ,  Suk-pil Kim ,  Kyoung-Iae Cho ,  Jung-hoon Lee ,  Seung-hwan Song

发明人： Jae-woong Hyun ,  Kyu-charn Park ,  Yoon-dong Park ,  Won-joo Kim ,  Young-gu Jin ,  Suk-pil Kim ,  Kyoung-Iae Cho ,  Jung-hoon Lee ,  Seung-hwan Song

IPC分类号： G11C16/04

CPC分类号： H01L27/115 ,  B82Y10/00 ,  G11C16/0483 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/11568 ,  H01L27/1203

摘要： A highly integrated non-volatile memory device and a method of operating the non-volatile memory device are provided. The non-volatile memory device includes a semiconductor layer. A plurality of upper control gate electrodes are arranged above the semiconductor layer. A plurality of lower control gate electrodes are arranged below the semiconductor layer, and the plurality of upper control gate electrodes and the plurality of lower control gate electrodes are disposed alternately. A plurality of upper charge storage layers are interposed between the semiconductor layer and the upper control gate electrodes. A plurality of lower charge storage layers are interposed between the semiconductor layer and the lower control gate electrodes.

摘要翻译： 提供高度集成的非易失性存储器件和操作非易失性存储器件的方法。 非易失性存储器件包括半导体层。 多个上控制栅电极设置在半导体层的上方。 多个下部控制栅电极配置在半导体层的下方，多个上部控制栅极电极和多个下部控制栅极电极交替配置。 多个上电荷存储层插入在半导体层和上控制栅电极之间。 多个下电荷存储层插入在半导体层和下控制栅电极之间。

公开(公告)号：US07352037B2

公开(公告)日：2008-04-01

申请号：US11393750

申请日：2006-03-31

申请人： Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  Eun-Hong Lee ,  Jae-woong Hyun ,  Jung-hoon Lee ,  Sung-jae Byun

发明人： Won-joo Kim ,  Suk-pil Kim ,  Yoon-dong Park ,  Eun-Hong Lee ,  Jae-woong Hyun ,  Jung-hoon Lee ,  Sung-jae Byun

IPC分类号： H01L29/94

CPC分类号： H01L29/66795 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/10876 ,  H01L27/10879 ,  H01L27/11507 ,  H01L27/2436 ,  H01L29/785

摘要： A semiconductor device may include at least one pair of fins on a semiconductor substrate. A channel region may be formed in each fin. The semiconductor device may further include a gate electrode corresponding to each pair of channel regions, a source contact plug electrically connected to each of at least one source formed on a respective fin concurrently, and a drain contact plug electrically connected to each of at least one drain formed on a respective fin concurrently.

摘要翻译： 半导体器件可以包括半导体衬底上的至少一对散热片。 可以在每个鳍中形成沟道区。 半导体器件还可以包括对应于每对沟道区的栅电极，同时电连接到形成在相应散热片上的至少一个源中的每一个的源极接触插塞以及电连接到至少一个 漏斗同时形成在相应的翅片上。