公开(公告)号：US07342280B2

公开(公告)日：2008-03-11

申请号：US11149396

申请日：2005-06-09

Applicant: Tae-kwang Yoo

Inventor： Tae-kwang Yoo

IPC: H01L29/792

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/42352 ,  H01L29/66833

Abstract: An electrically erasable programmable read-only memory (EEPROM) comprises trench isolation regions whose upper surfaces are recessed compared with an upper surface of the semiconductor substrate, thereby allowing use of all surfaces of a protrusion of the semiconductor substrate between the isolation regions, including the upper surface of the semiconductor substrate, as an active region. Accordingly, the performance of a memory cell can be improved by increasing the size of an active channel region without needing to change the size of a planar unit cell.

Abstract translation: 电可擦除可编程只读存储器（EEPROM）包括与半导体衬底的上表面相比上表面凹陷的沟槽隔离区域，从而允许在隔离区域之间使用半导体衬底的突起的所有表面，包括 半导体衬底的上表面作为有源区。 因此，可以通过增加有源沟道区的尺寸而不需要改变平面单元的尺寸来提高存储单元的性能。

公开(公告)号：US20060234457A1

公开(公告)日：2006-10-19

申请号：US11444186

申请日：2006-05-31

Applicant: Tae-kwang Yoo

Inventor： Tae-kwang Yoo

IPC: H01L21/336

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/42352 ,  H01L29/66833

Abstract: A method of fabricating an a non-volatile memory includes forming trench isolation regions in an inactive region of a semiconductor substrate, adjacent trench isolation regions defining respective protrusions having rounded edges therebetween, wherein upper surfaces of the trench isolation regions are lower than an upper surface of the semiconductor substrate and wherein the protrusions define an active region, forming a tunnel insulating layer covering the protrusion of the semiconductor substrate, and forming, sequentially, a storage layer, a blocking insulating layer, and a gate layer covering the tunnel insulating layer.

Abstract translation: 一种制造非易失性存储器的方法包括在半导体衬底的非活性区域中形成沟槽隔离区域，邻近沟槽隔离区域限定在其间具有圆形边缘的相应突起，其中沟槽隔离区域的上表面比上表面 并且其中所述突起限定有源区，形成覆盖所述半导体衬底的所述突起的隧道绝缘层，以及依次形成覆盖所述隧道绝缘层的存储层，阻挡绝缘层和栅极层。

公开(公告)号：US20050236680A1

公开(公告)日：2005-10-27

申请号：US11149396

申请日：2005-06-09

Applicant: Tae-kwang Yoo

Inventor： Tae-kwang Yoo

IPC: H01L21/8247 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/42352 ,  H01L29/66833

Abstract: An electrically erasable programmable read-only memory (EEPROM) comprises trench isolation regions whose upper surfaces are recessed compared with an upper surface of the semiconductor substrate, thereby allowing use of all surfaces of a protrusion of the semiconductor substrate between the isolation regions, including the upper surface of the semiconductor substrate, as an active region. Accordingly, the performance of a memory cell can be improved by increasing the size of an active channel region without needing to change the size of a planar unit cell.

Abstract translation: 电可擦除可编程只读存储器（EEPROM）包括与半导体衬底的上表面相比上表面凹陷的沟槽隔离区域，从而允许在隔离区域之间使用半导体衬底的突起的所有表面，包括 半导体衬底的上表面作为有源区。 因此，可以通过增加有源沟道区的尺寸而不需要改变平面单元的尺寸来提高存储单元的性能。

公开(公告)号：US07344949B2

公开(公告)日：2008-03-18

申请号：US11444186

申请日：2006-05-31

Applicant: Tae-kwang Yoo

Inventor： Tae-kwang Yoo

IPC: H01L21/336

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/42352 ,  H01L29/66833

Abstract: A method of fabricating an a non-volatile memory includes forming trench isolation regions in an inactive region of a semiconductor substrate, adjacent trench isolation regions defining respective protrusions having rounded edges therebetween, wherein upper surfaces of the trench isolation regions are lower than an upper surface of the semiconductor substrate and wherein the protrusions define an active region, forming a tunnel insulating layer covering the protrusion of the semiconductor substrate, and forming, sequentially, a storage layer, a blocking insulating layer, and a gate layer covering the tunnel insulating layer.

Abstract translation: 一种制造非易失性存储器的方法包括在半导体衬底的非活性区域中形成沟槽隔离区域，邻近沟槽隔离区域限定在其间具有圆形边缘的相应突起，其中沟槽隔离区域的上表面比上表面 并且其中所述突起限定有源区，形成覆盖所述半导体衬底的所述突起的隧道绝缘层，以及依次形成覆盖所述隧道绝缘层的存储层，阻挡绝缘层和栅极层。

公开(公告)号：US06913969B2

公开(公告)日：2005-07-05

申请号：US10446970

申请日：2003-05-28

Applicant: Tae-kwang Yoo

Inventor： Tae-kwang Yoo

IPC: H01L21/8247 ,  H01L21/8246 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L21/8242

CPC classification number: H01L27/11568 ,  H01L21/28282 ,  H01L27/115 ,  H01L29/42352 ,  H01L29/66833

Abstract: An electrically erasable programmable read-only memory (EEPROM) comprises trench isolation regions whose upper surfaces are recessed compared with an upper surface of the semiconductor substrate, thereby allowing use of all surfaces of a protrusion of the semiconductor substrate between the isolation regions, including the upper surface of the semiconductor substrate, as an active region. Accordingly, the performance of a memory cell can be improved by increasing the size of an active channel region without needing to change the size of a planar unit cell.