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    SEMICONDUCTOR DEVICES HAVING NITRIDED GATE INSULATING LAYER AND METHODS OF FABRICATING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICES HAVING NITRIDED GATE INSULATING LAYER AND METHODS OF FABRICATING THE SAME 有权
    具有氮化物绝缘层的半导体器件及其制造方法

    公开(公告)号：US20130171801A1

    公开(公告)日：2013-07-04

    申请号：US13604352

    申请日：2012-09-05

    申请人： Tai-Su PARK ,  Jin-Hyuk CHOI ,  Sang-Chul HAN ,  Jung-Sup OH ,  Young-Dong LEE

    发明人： Tai-Su PARK ,  Jin-Hyuk CHOI ,  Sang-Chul HAN ,  Jung-Sup OH ,  Young-Dong LEE

    IPC分类号： H01L21/28 ,  H01L21/314

    CPC分类号： C23C16/34 ,  C23C28/04 ,  H01L21/0214 ,  H01L21/02332 ,  H01L21/0234 ,  H01L21/28202 ,  H01L29/0657 ,  H01L29/42356 ,  H01L29/518 ,  H01L29/66621

    摘要： Semiconductor devices, and methods of fabricating the same, include forming device isolation regions in a substrate to define active regions, forming gate trenches in the substrate to expose the active regions and device isolation regions, conformally forming a preliminary gate insulating layer including silicon oxide on the active regions exposed in the grate trenches, nitriding the preliminary gate insulating layer using a radio-frequency bias having a frequency of about 13.56 MHz and power between about 100 W and about 300 W to form a nitrided preliminary gate insulating layer including silicon oxynitride, forming a gate electrode material layer on the nitride preliminary gate insulating layer, partially removing the nitrided preliminary gate insulating layer and the gate electrode material layer to respectively form a gate insulating layer and a gate electrode layer, and forming a gate capping layer on the gate electrode layer to fill the gate trenches.

    摘要翻译： 半导体器件及其制造方法包括在衬底中形成器件隔离区域以限定有源区域，在衬底中形成栅极沟槽以暴露有源区域和器件隔离区域，以共形形成包括氧化硅在内的初步栅极绝缘层 在栅极沟槽中暴露的有源区域，使用频率约13.56MHz，功率在约100W至约300W之间的射频偏压来对初级栅极绝缘层进行氮化，以形成氮化预备栅极绝缘层，其包括氮氧化硅， 在氮化物预选绝缘层上形成栅电极材料层，部分去除氮化预栅极绝缘层和栅电极材料层，分别形成栅极绝缘层和栅极电极层，并在栅极上形成栅极覆盖层 电极层填充栅极沟槽。