公开(公告)号：US20240387536A1

公开(公告)日：2024-11-21

申请号：US18788931

申请日：2024-07-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Hsi-Jung Wu ,  Sheng-Fu Yu ,  Ru-Shang Hsiao ,  Ying-Hsin Lu

IPC: H01L27/088 ,  H01L21/762 ,  H01L29/66

Abstract: An embodiment includes a semiconductor device, a plurality of fin structures extending from a substrate, the plurality of fin structures having a plurality of first fin structures and a plurality of second fin structures. The semiconductor device also includes a plurality of isolation regions on the substrate and disposed between the plurality of fin structures. The device also includes a plurality of gate structures on the plurality of isolation regions. The device also includes a plurality of epitaxy structures on one of the plurality of first fin structures. The device also includes a plurality of contact structures on the plurality of epitaxy structures, where the plurality of first fin structures, the plurality of gate structures, the plurality of epitaxy structures, and the plurality of contact structures are components of one or more resonators.

公开(公告)号：US09627426B2

公开(公告)日：2017-04-18

申请号：US14192168

申请日：2014-02-27

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd

Inventor： Volume Chien ,  Yu-Heng Cheng ,  Fu-Tsun Tsai ,  Hsi-Jung Wu ,  Chi-Cherng Jeng

IPC: H01L27/146

CPC classification number: H01L27/14629 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14685

Abstract: Embodiments of the disclosure provide an image sensor device. The image sensor device includes a semiconductor substrate. The semiconductor substrate has a front surface, a back surface opposite to the front surface, a light-sensing region close to the front surface, and a trench adjacent to the light-sensing region. The image sensor device includes a reflective layer positioned on an inner wall of the trench, wherein the reflective layer has a light reflectivity ranging from about 70% to about 100%.

公开(公告)号：US09728511B2

公开(公告)日：2017-08-08

申请号：US14109162

申请日：2013-12-17

Applicant: Taiwan Semiconductor Manufacturing CO., LTD.

Inventor： Hsi-Jung Wu ,  Volume Chien ,  Ying-Lang Wang ,  Hsin-Chi Chen ,  Ying-Hao Chen ,  Hung-Ta Huang

IPC: H01L23/544 ,  H01L23/00 ,  H01L23/58 ,  H01L21/784

CPC classification number: H01L23/562 ,  H01L21/784 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/00

Abstract: A semiconductor wafer includes a substrate, an integrated circuit and a die seal ring structure. The substrate is with a die region, a die seal ring region surrounding the die region and a scribe line region surrounding the die seal ring region. The substrate includes a first surface and a second surface opposite to the first surface, and periodic recesses within the first surface of the die seal ring region, the scribe line region or both the die seal ring region and the scribe line region. The integrated circuit is located on the first surface and the second surface of the die region. The die seal ring structure is located on the second surface of the die seal ring region. A semiconductor die is also provided.

公开(公告)号：US20150170985A1

公开(公告)日：2015-06-18

申请号：US14109162

申请日：2013-12-17

Applicant: Taiwan Semiconductor Manufacturing CO., LTD.

Inventor： Hsi-Jung Wu ,  Volume Chien ,  Ying-Lang Wang ,  Hsin-Chi Chen ,  Ying-Hao Chen ,  Hung-Ta Huang

IPC: H01L23/10 ,  H01L23/544 ,  H01L23/00

CPC classification number: H01L23/562 ,  H01L21/784 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/14 ,  H01L2924/00

Abstract: A semiconductor wafer includes a substrate, an integrated circuit and a die seal ring structure. The substrate is with a die region, a die seal ring region surrounding the die region and a scribe line region surrounding the die seal ring region. The substrate includes a first surface and a second surface opposite to the first surface, and periodic recesses within the first surface of the die seal ring region, the scribe line region or both the die seal ring region and the scribe line region. The integrated circuit is located on the first surface and the second surface of the die region. The die seal ring structure is located on the second surface of the die seal ring region. A semiconductor die is also provided.

Abstract translation: 半导体晶片包括基板，集成电路和模具密封环结构。 基板具有模具区域，围绕模具区域的模具密封环区域和围绕模具密封环区域的划线区域。 基板包括与第一表面相对的第一表面和第二表面，以及在模具密封环区域的第一表面，划线区域或模具密封环区域和划线区域内的周期性凹槽。 集成电路位于模具区域的第一表面和第二表面上。 模具密封环结构位于模具密封环区域的第二表面上。 还提供半导体管芯。