公开(公告)号：US20230260843A1

公开(公告)日：2023-08-17

申请号：US18306855

申请日：2023-04-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ryan Chia-Jen Chen ,  Yih-Ann Lin ,  Chia Tai Lin ,  Chao-Cheng Chen

IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L21/762 ,  H01L21/308

CPC classification number: H01L21/823431 ,  H01L29/6681 ,  H01L27/0886 ,  H01L21/76232 ,  H01L21/3081 ,  H01L21/823481

Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.

公开(公告)号：US11670552B2

公开(公告)日：2023-06-06

申请号：US17239965

申请日：2021-04-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ryan Chia-Jen Chen ,  Yih-Ann Lin ,  Chia Tai Lin ,  Chao-Cheng Chen

IPC: H01L29/78 ,  H01L29/49 ,  H01L29/06 ,  H01L27/088 ,  H01L21/8234 ,  H01L29/66 ,  H01L21/762 ,  H01L21/308 ,  H01L21/336

CPC classification number: H01L21/823431 ,  H01L21/3081 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/6681

Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.

公开(公告)号：US20240363422A1

公开(公告)日：2024-10-31

申请号：US18769106

申请日：2024-07-10

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ryan Chia-Jen Chen ,  Yih-Ann Lin ,  Chia Tai Lin ,  Chao-Cheng Chen

IPC: H01L21/8234 ,  H01L21/308 ,  H01L21/762 ,  H01L27/088 ,  H01L29/66

CPC classification number: H01L21/823431 ,  H01L21/3081 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/6681

Abstract: A device includes a semiconductor substrate, and a plurality of semiconductor fins parallel to each other, wherein the plurality of semiconductor fins is a portion of the semiconductor substrate. A Shallow Trench Isolation (STI) region is on a side of the plurality of semiconductor fins. The STI region has a top surface and a non-flat bottom surface, wherein the plurality of semiconductor fins is over the top surface of the STI region.

公开(公告)号：US12068199B2

公开(公告)日：2024-08-20

申请号：US18306855

申请日：2023-04-25

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ryan Chia-Jen Chen ,  Yih-Ann Lin ,  Chia Tai Lin ,  Chao-Cheng Chen

IPC: H01L29/66 ,  H01L21/308 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/088

CPC classification number: H01L21/823431 ,  H01L21/3081 ,  H01L21/76232 ,  H01L21/823481 ,  H01L27/0886 ,  H01L29/6681

Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.

公开(公告)号：US20210242088A1

公开(公告)日：2021-08-05

申请号：US17239965

申请日：2021-04-26

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Ryan Chia-Jen Chen ,  Yih-Ann Lin ,  Chia Tai Lin ,  Chao-Cheng Chen

IPC: H01L21/8234 ,  H01L29/66 ,  H01L27/088 ,  H01L21/762 ,  H01L21/308

Abstract: A method includes forming a patterned etching mask, which includes a plurality of strips, and etching a semiconductor substrate underlying the patterned etching mask to form a first plurality of semiconductor fins and a second plurality of semiconductor fins. The patterned etching mask is used as an etching mask in the etching. The method further includes etching the second plurality of semiconductor fins without etching the first plurality of semiconductor fins. An isolation region is then formed, and the first plurality of semiconductor fins has top portions protruding higher than a top surface of the isolation region.