公开(公告)号：US20230154764A1

公开(公告)日：2023-05-18

申请号：US17655645

申请日：2022-03-21

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Tzu-Sung Huang ,  Tsung-Hsien Chiang ,  Ming Hung Tseng ,  Hao-Yi Tsai ,  Yu-Hsiang Hu ,  Chih-Wei Lin ,  Lipu Kris Chuang ,  Wei Lun Tsai ,  Kai-Ming Chiang ,  Ching Yao Lin ,  Chao-Wei Li ,  Ching-Hua Hsieh

IPC: H01L21/48 ,  H01L23/498

CPC classification number: H01L21/4857 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/32

Abstract: A method includes forming a first metal mesh over a carrier, forming a first dielectric layer over the first metal mesh, and forming a second metal mesh over the first dielectric layer. The first metal mesh and the second metal mesh are staggered. The method further includes forming a second dielectric layer over the second metal mesh, attaching a device die over the second dielectric layer, with the device die overlapping the first metal mesh and the second metal mesh, encapsulating the device die in an encapsulant, and forming redistribution lines over and electrically connecting to the device die.