SEMICONDUCTOR DEVICE HAVING FINS
    2.
    发明申请

    公开(公告)号:US20190355814A1

    公开(公告)日:2019-11-21

    申请号:US16525346

    申请日:2019-07-29

    Abstract: A semiconductor device includes a semiconductive substrate, a first semiconductive fin and a second semiconductive fin extending upwards from the semiconductive substrate, an isolation structure at least partially between the first semiconductive fin and the second semiconductive fin, a first semiconductive raised portion and a second semiconductive raised portion. The first semiconductive raised portion extends upwards from the semiconductive substrate, is buried under the isolation structure, and is between the first semiconductive fin and the second semiconductive fin. A top surface of the first semiconductive fin is higher than a top surface of the first semiconductive raised portion. The second semiconductive raised portion extends upwards from the semiconductive substrate, is buried under the isolation structure, and is between the first semiconductive raised portion and the second semiconductive fin.

    SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
    3.
    发明申请
    SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF 有权
    半导体结构及其制造方法

    公开(公告)号:US20160190240A1

    公开(公告)日:2016-06-30

    申请号:US14718841

    申请日:2015-05-21

    CPC classification number: H01L29/0649 H01L21/76229 H01L29/0657

    Abstract: A semiconductor structure includes a semiconductor substrate, a first active area, a second active area, a first trench, at least one raised portion, and a first dielectric. The first active area is in the semiconductor substrate. The second active area is in the semiconductor substrate. The first trench is in the semiconductor substrate and separates the first active area and the second active area from each other. The raised portion is raised from the semiconductor substrate and is disposed in the first trench. The first dielectric is in the first trench and covers the raised portion.

    Abstract translation: 半导体结构包括半导体衬底,第一有源区,第二有源区,第一沟槽,至少一个凸起部分和第一电介质。 第一有源区在半导体衬底中。 第二有源区在半导体衬底中。 第一沟槽位于半导体衬底中并将第一有源区和第二有源区彼此分离。 凸起部分从半导体衬底升高并设置在第一沟槽中。 第一电介质在第一沟槽中并覆盖凸起部分。

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