公开(公告)号：US20170141228A1

公开(公告)日：2017-05-18

申请号：US14941669

申请日：2015-11-16

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Austin Hsu ,  Ching Yu ,  Ernest Chiu

IPC: H01L29/78 ,  H01L29/165 ,  H01L29/66

CPC classification number: H01L29/7848 ,  H01L21/76224 ,  H01L21/823425 ,  H01L21/823475 ,  H01L21/823481 ,  H01L21/823814 ,  H01L21/823864 ,  H01L21/823878 ,  H01L27/0705 ,  H01L27/088 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/41783 ,  H01L29/4232 ,  H01L29/66575 ,  H01L29/66628 ,  H01L29/66636 ,  H01L29/7845 ,  H01L29/7846

Abstract: A field effect transistor comprising a substrate, at least one gate structure, spacers and strained source and drain regions is described. The at least one gate structure is disposed on the substrate and between the recesses and the isolation structures. The spacers are disposed on sidewalls of the at least one gate structure. The strained source and drain regions are disposed in the recesses and on two opposite sides of the at least one gate structure, and top edges of the strained source and drain regions are covered by the spacers and located beneath the spacers.