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公开(公告)号:US12040233B2
公开(公告)日:2024-07-16
申请号:US17329998
申请日:2021-05-25
发明人: Meng Jhe Tsai , Hong-Jie Yang , Meng-Chun Chang , Hao Chiang , Chia-Ying Lee , Huan-Just Lin , Chuan Chang
IPC分类号: H01L21/82 , H01L21/8234 , H01L27/092 , H01L29/66 , H01L29/78
CPC分类号: H01L21/823431 , H01L27/0924 , H01L29/66795 , H01L29/7851
摘要: A method of forming a semiconductor device includes: forming a metal gate structure over a fin that protrudes above a substrate, the metal gate structure being surrounded by an interlayer dielectric (ILD) layer; recessing the metal gate structure below an upper surface of the ILD layer distal from the substrate; after the recessing, forming a first dielectric layer over the recessed metal gate structure; forming an etch stop layer (ESL) over the first dielectric layer and the ILD layer; forming a second dielectric layer over the ESL; performing a first dry etch process to form an opening that extends through the second dielectric layer, through the ESL, and into the first dielectric layer; after the first dry etch process, performing a wet etch process to clean the opening; and after the wet etch process, performing a second dry etch process to extend the opening through the first dielectric layer.
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公开(公告)号:US20220293471A1
公开(公告)日:2022-09-15
申请号:US17329998
申请日:2021-05-25
发明人: Meng Jhe Tsai , Hong-Jie Yang , Meng-Chun Chang , Hao Chiang , Chia-Ying Lee , Huan-Just Lin , Chuan Chang
IPC分类号: H01L21/8234 , H01L29/66 , H01L27/092 , H01L29/78
摘要: A method of forming a semiconductor device includes: forming a metal gate structure over a fin that protrudes above a substrate, the metal gate structure being surrounded by an interlayer dielectric (ILD) layer; recessing the metal gate structure below an upper surface of the ILD layer distal from the substrate; after the recessing, forming a first dielectric layer over the recessed metal gate structure; forming an etch stop layer (ESL) over the first dielectric layer and the ILD layer; forming a second dielectric layer over the ESL; performing a first dry etch process to form an opening that extends through the second dielectric layer, through the ESL, and into the first dielectric layer; after the first dry etch process, performing a wet etch process to clean the opening; and after the wet etch process, performing a second dry etch process to extend the opening through the first dielectric layer.
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公开(公告)号:US20240332085A1
公开(公告)日:2024-10-03
申请号:US18741063
申请日:2024-06-12
发明人: Meng Jhe Tsai , Hong-Jie Yang , Meng-Chun Chang , Hao Chiang , Chia-Ying Lee , Huan-Just Lin , Chuan Chang
IPC分类号: H01L21/8234 , H01L27/092 , H01L29/66 , H01L29/78
CPC分类号: H01L21/823431 , H01L27/0924 , H01L29/66795 , H01L29/7851
摘要: A method of forming a semiconductor device includes: forming a metal gate structure over a fin that protrudes above a substrate, the metal gate structure being surrounded by an interlayer dielectric (ILD) layer; recessing the metal gate structure below an upper surface of the ILD layer distal from the substrate; after the recessing, forming a first dielectric layer over the recessed metal gate structure; forming an etch stop layer (ESL) over the first dielectric layer and the ILD layer; forming a second dielectric layer over the ESL; performing a first dry etch process to form an opening that extends through the second dielectric layer, through the ESL, and into the first dielectric layer; after the first dry etch process, performing a wet etch process to clean the opening; and after the wet etch process, performing a second dry etch process to extend the opening through the first dielectric layer.
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