公开(公告)号：US20190131223A1

公开(公告)日：2019-05-02

申请号：US15884357

申请日：2018-01-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mao-Yen Chang ,  Hao-Yi Tsai ,  Kuo-Lung Pan ,  Tin-Hao Kuo ,  Tzung-Hui Lee ,  Teng-Yuan Lo ,  Hao-Chun Ting

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L25/10

Abstract: Semiconductor package s and methods of forming the same are disclosed. The semiconductor package includes a chip, a redistribution circuit structure and a UBM pattern. The redistribution circuit structure is disposed over and electrically connected to the chip and includes a topmost conductive pattern. The UBM pattern is disposed over and electrically connected to the topmost conductive pattern, wherein the UBM pattern includes a set of vias and a pad on the set of vias, wherein the vias are arranged in an array and electrically connected to the pad and the topmost conductive pattern.

公开(公告)号：US10461023B2

公开(公告)日：2019-10-29

申请号：US15884357

申请日：2018-01-30

Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

Inventor： Mao-Yen Chang ,  Hao-Yi Tsai ,  Kuo-Lung Pan ,  Tin-Hao Kuo ,  Tzung-Hui Lee ,  Teng-Yuan Lo ,  Hao-Chun Ting

IPC: H01L23/498 ,  H01L23/31 ,  H01L21/48 ,  H01L25/10

Abstract: Semiconductor package s and methods of forming the same are disclosed. The semiconductor package includes a chip, a redistribution circuit structure and a UBM pattern. The redistribution circuit structure is disposed over and electrically connected to the chip and includes a topmost conductive pattern. The UBM pattern is disposed over and electrically connected to the topmost conductive pattern, wherein the UBM pattern includes a set of vias and a pad on the set of vias, wherein the vias are arranged in an array and electrically connected to the pad and the topmost conductive pattern.